1 INST "ram_data<0>" TNM = "RAMDAT"; #SRAM data
\r
2 INST "ram_data<1>" TNM = "RAMDAT"; #SRAM data
\r
3 INST "ram_data<2>" TNM = "RAMDAT"; #SRAM data
\r
4 INST "ram_data<3>" TNM = "RAMDAT"; #SRAM data
\r
5 INST "ram_data<4>" TNM = "RAMDAT"; #SRAM data
\r
6 INST "ram_data<5>" TNM = "RAMDAT"; #SRAM data
\r
7 INST "ram_data<6>" TNM = "RAMDAT"; #SRAM data
\r
8 INST "ram_data<7>" TNM = "RAMDAT"; #SRAM data
\r
9 INST "ram_data<8>" TNM = "RAMDAT"; #SRAM data
\r
10 INST "ram_data<9>" TNM = "RAMDAT"; #SRAM data
\r
11 INST "ram_data<10>" TNM = "RAMDAT"; #SRAM data
\r
12 INST "ram_data<11>" TNM = "RAMDAT"; #SRAM data
\r
13 INST "ram_data<12>" TNM = "RAMDAT"; #SRAM data
\r
14 INST "ram_data<13>" TNM = "RAMDAT"; #SRAM data
\r
15 INST "ram_data<14>" TNM = "RAMDAT"; #SRAM data
\r
16 INST "ram_data<15>" TNM = "RAMDAT"; #SRAM data
\r
17 INST "ram_address<1>" TNM = "RAMADD"; #SRAM address
\r
18 INST "ram_address<2>" TNM = "RAMADD"; #SRAM address
\r
19 INST "ram_address<3>" TNM = "RAMADD"; #SRAM address
\r
20 INST "ram_address<4>" TNM = "RAMADD"; #SRAM address
\r
21 INST "ram_address<5>" TNM = "RAMADD"; #SRAM address
\r
22 INST "ram_address<6>" TNM = "RAMADD"; #SRAM address
\r
23 INST "ram_address<7>" TNM = "RAMADD"; #SRAM address
\r
24 INST "ram_address<8>" TNM = "RAMADD"; #SRAM address
\r
25 INST "ram_address<9>" TNM = "RAMADD"; #SRAM address
\r
26 INST "ram_address<10>" TNM = "RAMADD"; #SRAM address
\r
27 INST "ram_address<11>" TNM = "RAMADD"; #SRAM address
\r
28 INST "ram_address<12>" TNM = "RAMADD"; #SRAM address
\r
29 INST "ram_address<13>" TNM = "RAMADD"; #SRAM address
\r
30 INST "ram_address<14>" TNM = "RAMADD"; #SRAM address
\r
31 INST "ram_address<15>" TNM = "RAMADD"; #SRAM address
\r
32 INST "ram_address<16>" TNM = "RAMADD"; #SRAM address
\r
33 INST "ram_address<17>" TNM = "RAMADD"; #SRAM address
\r
34 INST "ram_address<18>" TNM = "RAMADD"; #SRAM address
\r
35 INST "ram_address<19>" TNM = "RAMADD"; #SRAM address
\r
36 INST "_ram_bhe" TNM = "RAMCTL"; #SRAM address and control
\r
37 INST "_ram_ble" TNM = "RAMCTL"; #SRAM address and control
\r
38 INST "_ram_we" TNM = "RAMCTL"; #SRAM address and control
\r
39 INST "_ram_oe" TNM = "RAMCTL"; #SRAM address and control
\r
40 INST "_ram_ce[0]" TNM = "RAMCTL"; #SRAM address and control
\r
41 INST "_ram_ce[1]" TNM = "RAMCTL"; #SRAM address and control
\r
42 INST "_ram_ce[2]" TNM = "RAMCTL"; #SRAM address and control
\r
43 INST "_ram_ce[3]" TNM = "RAMCTL"; #SRAM address and control
\r
44 INST "_cpu_as" TNM = "CPU_AS";
\r
45 INST "_cpu_uds" TNM = "CPU_DS";
\r
46 INST "_cpu_lds" TNM = "CPU_DS";
\r
47 INST "_cpu_dtack" TNM = "CPU_DTACK";
\r
48 #TIMESPEC TS11 = FROM "FFS" TO "RAMCTL" 33 ns;
\r
49 #TIMESPEC TS12 = FROM "RAMDAT" TO "FFS" 33 ns;
\r
50 #TIMESPEC TS13 = FROM "FFS" TO "RAMDAT" 33 ns;
\r
51 #TIMESPEC TS14 = FROM "FFS" TO "RAMADD" 33 ns;
\r
52 TIMESPEC TS14 = FROM "CPU_DS" TO "RAMCTL" 20 ns;
\r
53 TIMESPEC TS14 = FROM "CPU_AS" TO "RAMCTL" 20 ns;
\r
54 TIMESPEC TS15 = FROM "CPU_AS" TO "CPU_DTACK" 20 ns;
\r
55 #TIMESPEC TS16 = FROM "RAMDAT" TO "CPU_DTACK" 20 ns;
\r
56 #TIMESPEC TS17 = FROM "CPU_DS" TO "CPU_DTACK" 20 ns;
\r
58 #PACE: Start of Constraints generated by PACE
\r
59 #PACE: Start of PACE I/O Pin Assignments
\r
60 NET "mclk" LOC = "P80" |IOSTANDARD = LVCMOS33 |PERIOD = 225;
\r
61 NET "_cpu_reset" LOC = "P95" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |PULLUP;
\r
62 NET "cpu_clk" LOC = "P101" |IOSTANDARD = LVCMOS33 |SLEW = FAST |DRIVE = 24;
\r
63 NET "_cpu_dtack" LOC = "P102" |IOSTANDARD = LVCMOS33 |SLEW = FAST |DRIVE = 12;
\r
64 NET "cpu_r_w" LOC = "P106" |IOSTANDARD = LVCMOS33 ;
\r
65 NET "_cpu_as" LOC = "P109" |IOSTANDARD = LVCMOS33 ;
\r
66 NET "_cpu_uds" LOC = "P108" |IOSTANDARD = LVCMOS33 ;
\r
67 NET "_cpu_lds" LOC = "P107" |IOSTANDARD = LVCMOS33 ;
\r
68 NET "_cpu_ipl[0]" LOC = "P96" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
69 NET "_cpu_ipl[1]" LOC = "P97" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
70 NET "_cpu_ipl[2]" LOC = "P100" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
71 NET "cpu_address[10]" LOC = "P149" |IOSTANDARD = LVCMOS33 ;
\r
72 NET "cpu_address[11]" LOC = "P148" |IOSTANDARD = LVCMOS33 ;
\r
73 NET "cpu_address[12]" LOC = "P147" |IOSTANDARD = LVCMOS33 ;
\r
74 NET "cpu_address[13]" LOC = "P146" |IOSTANDARD = LVCMOS33 ;
\r
75 NET "cpu_address[14]" LOC = "P144" |IOSTANDARD = LVCMOS33 ;
\r
76 NET "cpu_address[15]" LOC = "P143" |IOSTANDARD = LVCMOS33 ;
\r
77 NET "cpu_address[16]" LOC = "P141" |IOSTANDARD = LVCMOS33 ;
\r
78 NET "cpu_address[17]" LOC = "P140" |IOSTANDARD = LVCMOS33 ;
\r
79 NET "cpu_address[18]" LOC = "P139" |IOSTANDARD = LVCMOS33 ;
\r
80 NET "cpu_address[19]" LOC = "P138" |IOSTANDARD = LVCMOS33 ;
\r
81 NET "cpu_address[1]" LOC = "P166" |IOSTANDARD = LVCMOS33 ;
\r
82 NET "cpu_address[20]" LOC = "P137" |IOSTANDARD = LVCMOS33 ;
\r
83 NET "cpu_address[21]" LOC = "P135" |IOSTANDARD = LVCMOS33 ;
\r
84 NET "cpu_address[22]" LOC = "P133" |IOSTANDARD = LVCMOS33 ;
\r
85 NET "cpu_address[23]" LOC = "P132" |IOSTANDARD = LVCMOS33 ;
\r
86 NET "cpu_address[2]" LOC = "P165" |IOSTANDARD = LVCMOS33 ;
\r
87 NET "cpu_address[3]" LOC = "P162" |IOSTANDARD = LVCMOS33 ;
\r
88 NET "cpu_address[4]" LOC = "P161" |IOSTANDARD = LVCMOS33 ;
\r
89 NET "cpu_address[5]" LOC = "P156" |IOSTANDARD = LVCMOS33 ;
\r
90 NET "cpu_address[6]" LOC = "P155" |IOSTANDARD = LVCMOS33 ;
\r
91 NET "cpu_address[7]" LOC = "P154" |IOSTANDARD = LVCMOS33 ;
\r
92 NET "cpu_address[8]" LOC = "P152" |IOSTANDARD = LVCMOS33 ;
\r
93 NET "cpu_address[9]" LOC = "P150" |IOSTANDARD = LVCMOS33 ;
\r
94 NET "cpu_data[0]" LOC = "P111" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
95 NET "cpu_data[10]" LOC = "P124" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
96 NET "cpu_data[11]" LOC = "P125" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
97 NET "cpu_data[12]" LOC = "P126" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
98 NET "cpu_data[13]" LOC = "P128" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
99 NET "cpu_data[14]" LOC = "P130" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
100 NET "cpu_data[15]" LOC = "P131" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
101 NET "cpu_data[1]" LOC = "P113" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
102 NET "cpu_data[2]" LOC = "P114" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
103 NET "cpu_data[3]" LOC = "P115" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
104 NET "cpu_data[4]" LOC = "P116" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
105 NET "cpu_data[5]" LOC = "P117" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
106 NET "cpu_data[6]" LOC = "P119" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
107 NET "cpu_data[7]" LOC = "P120" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
108 NET "cpu_data[8]" LOC = "P122" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
109 NET "cpu_data[9]" LOC = "P123" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
110 NET "_ram_ce[0]" LOC = "P28" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
111 NET "_ram_ce[1]" LOC = "P20" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
112 NET "_ram_ce[2]" LOC = "P15" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
113 NET "_ram_ce[3]" LOC = "P18" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
114 NET "_ram_oe" LOC = "P39" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
115 NET "_ram_we" LOC = "P72" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
116 NET "_ram_bhe" LOC = "P40" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
117 NET "_ram_ble" LOC = "P42" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
118 NET "ram_address[10]" LOC = "P58" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
119 NET "ram_address[11]" LOC = "P61" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
120 NET "ram_address[12]" LOC = "P62" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
121 NET "ram_address[13]" LOC = "P63" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
122 NET "ram_address[14]" LOC = "P64" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
123 NET "ram_address[15]" LOC = "P79" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
124 NET "ram_address[16]" LOC = "P78" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
125 NET "ram_address[17]" LOC = "P77" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
126 NET "ram_address[18]" LOC = "P76" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
127 NET "ram_address[19]" LOC = "P74" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
128 NET "ram_address[1]" LOC = "P27" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
129 NET "ram_address[2]" LOC = "P26" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
130 NET "ram_address[3]" LOC = "P24" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
131 NET "ram_address[4]" LOC = "P22" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
132 NET "ram_address[5]" LOC = "P21" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
133 NET "ram_address[6]" LOC = "P35" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
134 NET "ram_address[7]" LOC = "P36" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
135 NET "ram_address[8]" LOC = "P37" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
136 NET "ram_address[9]" LOC = "P57" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
137 NET "ram_data[0]" LOC = "P29" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
138 NET "ram_data[10]" LOC = "P50" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
139 NET "ram_data[11]" LOC = "P48" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
140 NET "ram_data[12]" LOC = "P46" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
141 NET "ram_data[13]" LOC = "P45" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
142 NET "ram_data[14]" LOC = "P44" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
143 NET "ram_data[15]" LOC = "P43" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
144 NET "ram_data[1]" LOC = "P31" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
145 NET "ram_data[2]" LOC = "P33" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
146 NET "ram_data[3]" LOC = "P34" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
147 NET "ram_data[4]" LOC = "P65" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
148 NET "ram_data[5]" LOC = "P67" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
149 NET "ram_data[6]" LOC = "P68" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
150 NET "ram_data[7]" LOC = "P71" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
151 NET "ram_data[8]" LOC = "P52" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
152 NET "ram_data[9]" LOC = "P51" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4 |KEEPER;
\r
153 NET "red[0]" LOC = "P4" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
154 NET "red[1]" LOC = "P5" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
155 NET "red[2]" LOC = "P7" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
156 NET "red[3]" LOC = "P9" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
157 NET "green[0]" LOC = "P204" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
158 NET "green[1]" LOC = "P205" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
159 NET "green[2]" LOC = "P2" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
160 NET "green[3]" LOC = "P3" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
161 NET "blue[0]" LOC = "P198" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
162 NET "blue[1]" LOC = "P199" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
163 NET "blue[2]" LOC = "P200" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
164 NET "blue[3]" LOC = "P203" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
165 NET "_hsync" LOC = "P196" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
166 NET "_vsync" LOC = "P197" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
167 NET "_joy1[0]" LOC = "P172" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
168 NET "_joy1[1]" LOC = "P171" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
169 NET "_joy1[2]" LOC = "P169" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
170 NET "_joy1[3]" LOC = "P167" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
171 NET "_joy1[4]" LOC = "P168" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
172 NET "_joy1[5]" LOC = "P175" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
173 NET "_joy2[0]" LOC = "P182" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
174 NET "_joy2[1]" LOC = "P181" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
175 NET "_joy2[2]" LOC = "P180" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
176 NET "_joy2[3]" LOC = "P176" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
177 NET "_joy2[4]" LOC = "P178" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
178 NET "_joy2[5]" LOC = "P183" |IOSTANDARD = LVCMOS33 |PULLUP;
\r
179 NET "kbdclk" LOC = "P11" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12 |PULLUP;
\r
180 NET "kbddat" LOC = "P10" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12 |PULLUP;
\r
181 NET "msclk" LOC = "P13" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12 |PULLUP;
\r
182 NET "msdat" LOC = "P12" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12 |PULLUP;
\r
183 NET "left" LOC = "P191" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
184 NET "right" LOC = "P190" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12;
\r
185 NET "sdi" LOC = "P85" |IOSTANDARD = LVCMOS33 ;
\r
186 NET "sdo" LOC = "P19" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
187 NET "sck" LOC = "P90" |IOSTANDARD = LVCMOS33 |CLOCK_DEDICATED_ROUTE = FALSE;
\r
188 NET "_spi_cs" LOC = "P93" |IOSTANDARD = LVCMOS33 ;
\r
189 NET "scsi_hshake" LOC = "P86" |IOSTANDARD = LVCMOS33 ;
\r
190 NET "nmi" LOC = "P87" |IOSTANDARD = LVCMOS33 ;
\r
191 NET "rxd" LOC = "P185" |IOSTANDARD = LVCMOS33 ;
\r
192 NET "txd" LOC = "P184" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
193 NET "rts" LOC = "P187" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
194 NET "cts" LOC = "P189" |IOSTANDARD = LVCMOS33 ;
\r
195 NET "pwrled" LOC = "P94" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 12 |PULLUP;
\r
196 NET "_15khz" LOC = "P194" |IOSTANDARD = LVCMOS33 |PULLUP ;
\r
197 NET "gpio" LOC = "P16" |IOSTANDARD = LVCMOS33 |PULLUP ;
\r
198 NET "init_b" LOC = "P83" |IOSTANDARD = LVCMOS33 |SLEW = SLOW |DRIVE = 4;
\r
199 NET "_cpu_as" CLOCK_DEDICATED_ROUTE = FALSE;
\r
projects / minimigmac.git / blob