;
; Contributors:
; Michael Neuling <mikey@neuling.org>
+; Jeremy Kerr <jk@ozlabs.org>
;
; Taken from:
; PowerPC® Microprocessor Family:
value: 0 big-endian
value: 1 little-endian
+
+; The PowerPC Architecture:
+; A Specification For A New Family Of RISC Processors
+; Book III PowerPC Operating Environment Architecture
+
+; Section 2.2.3 Machine State Register (MSR)
+[MSR_32]
+name: PowerPC Machine State Register
+field: 13 Power Management Enable (POW)
+field: 15 Little-Endian Exception Mode (ILE)
+field: 16 External Interrupt Enable (EE)
+field: 17 Problem State (PR)
+value: 0 privileged state
+value: 1 problem state
+field: 18 Floating-Point Available (FP)
+field: 19 Machine Check Interrupt Enable (ME)
+field: 20,23 Floating-Point Exception Mode (FE)
+value: 0 ignore exceptions
+value: 1 imprecise nonrecoverable
+value: 2 imprecise recoverable
+value: 3 precise
+field: 21 Single-Step Trace Enable (SE)
+field: 22 Branch Trace Enable (BE)
+field: 26 Instruction Relocate (IR)
+field: 27 Data Relocate (DR)
+field: 30 Recoverable Interrupt (RI)
+field: 31 Little-Endian Mode (LE)
+value: 0 big-endian
+value: 1 little-endian