#include <string.h>
enum {
- CPU_PROC_BRAND_STRING_INTERNAL0 = 0x80000003,
- CPU_PROC_BRAND_STRING_INTERNAL1 = 0x80000004
+ CPUID_PROC_BRAND_STRING_INTERNAL0 = 0x80000003,
+ CPUID_PROC_BRAND_STRING_INTERNAL1 = 0x80000004
};
#ifndef _MSC_VER
}
#endif
-static struct {
- uint32_t feature;
- uint32_t mask;
- bool use_edx; /* ecx will be used if false. */
-} features[] = {
- { CF_MMX, 1 << 23, true },
- { CF_SSE, 1 << 25, true },
- { CF_SSE2, 1 << 26, true },
- { CF_SSE3, 1 << 9, false },
- { CF_FPU, 1 << 0, true },
-
- { CF_TSC, 1 << 4, true },
- { CF_MSR, 1 << 5, true },
-
- { CF_SSSE3, 1 << 9, false },
- { CF_AVX, 1 << 28, false },
-
- /* Extended ones. */
- { CEF_x64, 1 << 30, true },
- { CEF_FPU, 1 << 0, true },
- { CEF_DE, 1 << 2, true },
- { CEF_SYSCALLRET, 1 << 11, true },
- { CEF_CMOV, 1 << 15, true },
-
- { CEF_SSE4a, 1 << 6, false },
- { CEF_FMA4, 1 << 16, false },
- { CEF_XOP, 1 << 11, false }
-};
-
bool cpuid_is_supported(void)
{
+ int ret = 0;
+#if defined(__GNUC__) || defined(__clang__)
/* The following assembly code uses EAX as the return value,
* but we store the value of EAX into ret since GCC uses EAX
* as the return register for every C function. That's a double
#define ASM_POPF "popfq\n\t"
#define ASM_PUSHEAX "pushq %%rax\n\t"
#define ASM_POPEAX "popq %%rax\n\t"
-#define ASM_PUSHECX "popq %%rcx\n\t"
+#define ASM_PUSHECX "pushq %%rcx\n\t"
#elif UINTPTR_MAX == 0xffffffff
#define ASM_PUSHF "pushfl\n\t"
#define ASM_POPF "popfl\n\t"
#define ASM_PUSHEAX "pushl %%eax\n\t"
#define ASM_POPEAX "popl %%eax\n\t"
-#define ASM_PUSHECX "popl %%ecx\n\t"
+#define ASM_PUSHECX "pushl %%ecx\n\t"
#endif
- int ret = 0;
asm volatile(
ASM_PUSHF
ASM_POPEAX
#undef ASM_PUSHEAX
#undef ASM_POPEAX
#undef ASM_PUSHECX
-
+#elif defined _MSC_VER
+ __asm {
+ pushfd
+ pop eax
+ mov ecx, eax
+ xor eax, 0x200000
+ push eax
+ popfd
+
+ pushfd
+ pop eax
+ xor eax, ecx
+ shr eax, 21
+ and eax, 1
+ push ecx
+ popfd
+
+ mov eax, ret
+ };
+#endif
return !!ret;
}
bool cpuid_test_feature(cpuid_t feature)
{
- if (feature > CPU_VIRT_PHYS_ADDR_SIZES || feature < CPU_EXTENDED_PROC_INFO_FEATURE_BITS)
+ if (feature > CPUID_VIRT_PHYS_ADDR_SIZES || feature < CPUID_EXTENDED_PROC_INFO_FEATURE_BITS)
return false;
return (feature <= cpuid_highest_ext_func_supported());
}
-bool cpuid_has_feature(int feature, bool extended)
+bool cpuid_has_ecxfeature(int feature)
{
- uint32_t eax, ebx, ecx, edx, i;
-
- if (!extended)
- ___cpuid(CPU_PROCINFO_AND_FEATUREBITS, &eax, &ebx, &ecx, &edx);
- else
- ___cpuid(CPU_EXTENDED_PROC_INFO_FEATURE_BITS, &eax, &ebx, &ecx, &edx);
-
- for (i = 0; i < sizeof(features) / sizeof(features[0]); ++i) {
- if (features[i].feature == feature) {
- if (features[i].use_edx)
- return (edx & features[i].mask);
- else
- return (ecx & features[i].mask);
- }
+ static uint32_t _ecx;
+ if (_ecx == 0) {
+#if defined(__GNUC__) || defined(__clang__)
+ asm volatile(
+ "cpuid\n\t"
+ : "=c" (_ecx)
+ : "a" (CPUID_PROCINFO_AND_FEATUREBITS)
+ );
+#elif defined _MSC_VER
+ __asm {
+ mov eax, CPUID_PROCINFO_AND_FEATUREBITS
+ cpuid
+ mov _ecx, ecx
+ };
+#endif
+ }
+
+ return (_ecx & feature) == feature;
+}
+
+bool cpuid_has_edxfeature(int feature)
+{
+ static uint32_t _edx;
+ if (_edx == 0) {
+#if defined(__GNUC__) || defined(__clang__)
+ asm volatile(
+ "cpuid\n\t"
+ : "=d" (_edx)
+ : "a" (CPUID_PROCINFO_AND_FEATUREBITS)
+ );
+#elif defined _MSC_VER
+ __asm {
+ mov eax, CPUID_PROCINFO_AND_FEATUREBITS
+ cpuid
+ mov _edx, edx
+ };
+#endif
}
- return false;
+
+ return (_edx & feature) == feature;
}
static const char *const cpuids[] = {
} u;
uint32_t i;
- ___cpuid(CPU_VENDORID, &i, &u.bufu32[0], &u.bufu32[2], &u.bufu32[1]);
+ ___cpuid(CPUID_VENDORID, &i, &u.bufu32[0], &u.bufu32[2], &u.bufu32[1]);
for (i = 0; i < sizeof(cpuids) / sizeof(cpuids[0]); ++i) {
if (strncmp(cpuids[i], u.buf, 12) == 0) {
cputype = (cputype_t)i;
return cputype;
}
-const char *cpuid_get_cpu_type_string(const cputype_t cputype)
+bool cpuid_sprintf_cputype(const cputype_t cputype, char *buf)
{
- return cpuids[(int)cputype];
+ if (cputype == CT_NONE)
+ return false;
+
+ memcpy(buf, cpuids[(int)cputype], 12);
+ buf[12] = '\0';
+ return true;
}
uint32_t cpuid_highest_ext_func_supported(void)
static uint32_t highest;
if (!highest) {
+#if defined(__GNUC__) || defined(__clang__)
asm volatile(
"cpuid\n\t"
: "=a" (highest)
- : "a" (CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED)
+ : "a" (CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED)
);
+#elif defined _MSC_VER
+ __asm {
+ mov eax, CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED
+ cpuid
+ mov highest, eax
+ };
+#endif
}
return highest;
/* Sanity checks, make sure we're not trying to do something
* invalid or we are trying to get information that isn't supported
* by the CPU. */
- if (info > CPU_VIRT_PHYS_ADDR_SIZES || (info > CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED
+ if (info > CPUID_VIRT_PHYS_ADDR_SIZES || (info > CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED
&& !cpuid_test_feature(info)))
return;
- if (info == CPU_PROC_BRAND_STRING) {
+ if (info == CPUID_PROC_BRAND_STRING) {
static char cached[48] = { 0 };
if (cached[0] == '\0') {
- ___cpuid(CPU_PROC_BRAND_STRING, &buf[0], &buf[1], &buf[2], &buf[3]);
- ___cpuid(CPU_PROC_BRAND_STRING_INTERNAL0, &buf[4], &buf[5], &buf[6], &buf[7]);
- ___cpuid(CPU_PROC_BRAND_STRING_INTERNAL1, &buf[8], &buf[9], &buf[10], &buf[11]);
+ ___cpuid(CPUID_PROC_BRAND_STRING, &buf[0], &buf[1], &buf[2], &buf[3]);
+ ___cpuid(CPUID_PROC_BRAND_STRING_INTERNAL0, &buf[4], &buf[5], &buf[6], &buf[7]);
+ ___cpuid(CPUID_PROC_BRAND_STRING_INTERNAL1, &buf[8], &buf[9], &buf[10], &buf[11]);
memcpy(cached, buf, sizeof cached);
} else
buf = (uint32_t *)cached;
return;
- } else if (info == CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED) {
+ } else if (info == CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED) {
*buf = cpuid_highest_ext_func_supported();
return;
}
___cpuid(info, &eax, &ebx, &ecx, &edx);
switch (info) {
- case CPU_VENDORID:
+ case CPUID_VENDORID:
buf[0] = ebx;
buf[1] = edx;
buf[2] = ecx;
break;
- case CPU_PROCINFO_AND_FEATUREBITS:
- buf[0] = eax; /* The so called "signature" of the CPU. */
- buf[1] = edx; /* Feature flags #1. */
- buf[2] = ecx; /* Feature flags #2. */
- buf[3] = ebx; /* Additional feature information. */
+ case CPUID_PROCINFO_AND_FEATUREBITS:
+ buf[0] = (eax & 0x0F); /* Stepping */
+ buf[1] = (eax >> 4) & 0x0F; /* Model */
+ buf[2] = (eax >> 8) & 0x0F; /* Family */
+ buf[3] = (eax >> 16) & 0x0F; /* Extended Model. */
+ buf[4] = (eax >> 24) & 0x0F; /* Extended Family. */
+
+ /* Additional Feature information. */
+ buf[5] = ebx & 0xFF;
+ buf[6] = (ebx >> 8) & 0xFF;
+ buf[7] = (ebx >> 16) & 0xFF;
+ buf[8] = ebx >> 24;
break;
- case CPU_CACHE_AND_TLBD_INFO:
+ case CPUID_CACHE_AND_TLBD_INFO:
buf[0] = eax;
buf[1] = ebx;
buf[2] = ecx;
buf[3] = edx;
break;
- case CPU_EXTENDED_PROC_INFO_FEATURE_BITS:
+ case CPUID_EXTENDED_PROC_INFO_FEATURE_BITS:
buf[0] = edx;
buf[1] = ecx;
break;
- case CPU_L1_CACHE_AND_TLB_IDS:
- buf[0] = eax;
- buf[1] = ebx;
- buf[2] = ecx;
- buf[3] = edx;
+ case CPUID_L1_CACHE_AND_TLB_IDS:
+ buf[0] = eax & 0xFF;
+ buf[1] = (eax >> 8) & 0xFF;
+ buf[2] = (eax >> 16) & 0xFF;
+ buf[3] = eax >> 24;
+
+ buf[4] = ebx & 0xFF;
+ buf[5] = (ebx >> 8) & 0xFF;
+ buf[6] = (ebx >> 16) & 0xFF;
+ buf[7] = ebx >> 24;
+
+ buf[8] = ecx & 0xFF;
+ buf[9] = (ecx >> 8) & 0xFF;
+ buf[10] = (ecx >> 16) & 0xFF;
+ buf[11] = ecx >> 24;
+
+ buf[12] = edx & 0xFF;
+ buf[13] = (edx >> 8) & 0xFF;
+ buf[14] = (edx >> 16) & 0xFF;
+ buf[15] = edx >> 24;
break;
- case CPU_EXTENDED_L2_CACHE_FEATURES:
- *buf = ecx;
+ case CPUID_EXTENDED_L2_CACHE_FEATURES:
+ buf[0] = ecx & 0xFF; /* Line size. */
+ buf[1] = (ecx >> 12) & 0xFF; /* Associativity. */
+ buf[2] = ecx >> 16; /* Cache size. */
break;
- case CPU_ADV_POWER_MGT_INFO:
+ case CPUID_ADV_POWER_MGT_INFO:
*buf = edx;
break;
- case CPU_VIRT_PHYS_ADDR_SIZES:
- *buf = eax;
+ case CPUID_VIRT_PHYS_ADDR_SIZES:
+ buf[0] = eax & 0xFF; /* physical. */
+ buf[1] = (eax >> 8) & 0xFF; /* virtual. */
break;
default:
*buf = 0xbaadf00d;