Makefile: Remove unused test targets

[ccan] / Makefile

diff --git a/Makefile b/Makefile
index ff0bad4e91acfd32d7a0e60366850b41b0c23ba8..a9dfed10f03844bc0c86e029b823a12373df4a8d 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -11,6 +11,7 @@ WARN_CFLAGS := -Wall -Wstrict-prototypes -Wold-style-definition -Wundef \
  -Wmissing-prototypes -Wmissing-declarations -Wpointer-arith -Wwrite-strings
 DEP_CFLAGS = -MMD -MP -MF$(@:%=%.d) -MT$@
 CCAN_CFLAGS := -g3 -ggdb $(WARN_CFLAGS) -DCCAN_STR_DEBUG=1 -I. $(CFLAGS)
+CFLAGS_FORCE_C_SOURCE := -x c
 
 # Anything with an _info file is a module ...
 INFO_SRCS := $(wildcard ccan/*/_info ccan/*/*/_info)
@@ -18,7 +19,7 @@ ALL_INFOS := $(INFO_SRCS:%_info=%info)
 ALL_MODULES := $(ALL_INFOS:%/info=%)
 
 # ... Except stuff that needs external dependencies, which we exclude
-EXCLUDE := altstack generator jmap jset nfs ogg_to_pcm tal/talloc wwviaudio
+EXCLUDE := altstack jmap jset nfs ogg_to_pcm tal/talloc wwviaudio
 MODULES:= $(filter-out $(EXCLUDE:%=ccan/%), $(ALL_MODULES))
 
 # Sources are C files in each module, objects the resulting .o files
@@ -32,7 +33,7 @@ DEPS := $(OBJS:%=%.d)
 
 # _info files are compiled into executables and don't need dependencies
 %info : %_info config.h
-       $(PRE)$(CC) $(CCAN_CFLAGS) -I. -o $@ -x c $<
+       $(PRE)$(CC) $(CCAN_CFLAGS) -I. -o $@ $(CFLAGS_FORCE_C_SOURCE) $<
 
 # config.h is built by configurator which has no ccan dependencies
 CONFIGURATOR := tools/configurator/configurator
@@ -75,7 +76,6 @@ TEST_DEPS := $(MODULES:%=%/.d)
 
 check: $(MODULES:%=%/.ok)
 fastcheck: $(MODULES:%=%/.fast.ok)
-fullcheck: $(MODULES:%=%/.full.ok)
 
 ifeq ($(strip $(filter clean config.h, $(MAKECMDGOALS))),)
 -include $(DEPS) $(LINT_DEPS) $(TOOLS_DEPS) $(TEST_DEPS)