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33833a9)
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
reg.width, mask, shift))
else:
bits.append(reg.bit_number(int(s)))
reg.width, mask, shift))
else:
bits.append(reg.bit_number(int(s)))
return bitfield(bits, name)
return bitfield(bits, name)
str += "%*s: 0x%x\n" \
% (name_width, field.name, v)
return str
str += "%*s: 0x%x\n" \
% (name_width, field.name, v)
return str
def bit_number(self, number):
if self.bit_order == self.bit_0_is_lsb:
number = self.width - 1 - number
def bit_number(self, number):
if self.bit_order == self.bit_0_is_lsb:
number = self.width - 1 - number
"Invalid bit order %s in %s" % \
(order_str, id))
reg.bit_order = order_map[order_str]
"Invalid bit order %s in %s" % \
(order_str, id))
reg.bit_order = order_map[order_str]
elif t[0] == 'alias':
alias_id = t[1].strip()
elif t[0] == 'alias':
alias_id = t[1].strip()
value_iter = args.__iter__()
else:
value_iter = iter(sys.stdin.readline, '')
value_iter = args.__iter__()
else:
value_iter = iter(sys.stdin.readline, '')
try:
for value in value_iter:
decode_value(reg, value.strip(), options)
try:
for value in value_iter:
decode_value(reg, value.strip(), options)