1 ; Definitions for the PowerPC architecture
4 ; Michael Neuling <mikey@neuling.org>
7 name: PowerPC Machine State Register
8 field: 0 64-bit mode (SF)
11 field: 3 Hypervisor State (HV)
12 field: 48 External Interrupt Enable (EE)
13 field: 49 Problem State (PR)
14 value: 0 privileged state
15 value: 1 problem state
16 field: 50 Floating-Point Available (FP)
17 field: 51 Machine Check Interrupt Enable (ME)
18 field: 52,55 Floating-Point Exception Mode (FE)
19 value: 0 ignore exceptions
20 value: 1 imprecise nonrecoverable
21 value: 2 imprecise recoverable
23 field: 53 Single-Step Trace Enable (SE)
24 field: 54 Branch Trace Enable (BE)
25 field: 58 Instruction Relocate (IR)
26 field: 59 Data Relocate (DR)
27 field: 61 Performance Monitor Mark (PMM)
28 field: 62 Recoverable Interrupt (RI)
29 field: 63 Little-Endian Mode (LE)
31 value: 1 little-endian
34 name: PowerPC SLB ESID Entry
35 field: 0:35 Effective segment ID (ESID)
40 name: PowerPC SLB VSID Entry
41 field: 0:1 Segment size selector (B)
46 field: 2:51 Virtual segment ID (VSID)
47 field: 52 Supervisor state storage key (Ks)
48 field: 53 Problem state storage key (Kp)
49 field: 55,58,59 Virtual page size selector
50 value: 0 4KB (Unless PTE specifies 64KB) (MPS)
51 value: 5 64KB (Provided PTE specifies 64KB) (MPS)
52 field: 54 No-execute segment (N)
55 value: 1 little-endian