default,all: sim_bench.vcd

SRC := sim_bench.v sim_clocks.v sim_sram.v sim_pic.v sim_mouse.v sim_kbd.v
SRC += m68k.v cpu_intf.v addr_decode.v
SRC += mem_intf.v via6522.v iwm.v ncr5380.v scc.v
SRC += spi_backbus.v spi_slave.v scope.v ctrl.v
SRC += video.v rtc.v ps2.v ps2_mouse.v ps2_kbd.v
SRC += minimigmac.v

sim_bench.vvp: $(SRC)
	iverilog -g2 -Wall -tvvp -D__IVERILOG__ -o $@ $^

sim_bench.vcd: sim_bench.vvp m68k_vpi.vpi
	vvp -M. -mm68k_vpi sim_bench.vvp

wave: sim_bench.vcd
	gtkwave ./sim_bench.vcd

clean:
	rm -f *.vvp
	rm -f *.vcd
	rm -f *.vpi
	rm -f *.o
distclean: clean
	rm -f *~