From 33833a9a90d83d4f804dd8d606c72eb7e02f9d89 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 21 Feb 2007 21:00:29 +1100 Subject: [PATCH] powerpc.conf updates Taking out some deprecated/nonarchitected MSR flags, adding PTE decoding. Signed-off-by: Jeremy Kerr --- conf/powerpc.conf | 44 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 39 insertions(+), 5 deletions(-) diff --git a/conf/powerpc.conf b/conf/powerpc.conf index 8e124cc..924526e 100644 --- a/conf/powerpc.conf +++ b/conf/powerpc.conf @@ -7,20 +7,18 @@ ; Taken from: ; PowerPC® Microprocessor Family: ; The Programming Environments Manual for 32 and 64-bit Microprocessors -; Version 2.3 +; Version 2.03 ; http://www.power.org/resources/downloads/PowerISA_203.Public.pdf ; -; Section 2.3.1 Machine State Register (MSR) +; Section 3.2.1 Machine State Register (MSR) [MSR_64] name: PowerPC Machine State Register field: 0 64-bit mode (SF) value: 0 32-bit mode value: 1 64-bit mode -field: 2 Exception 64-bit mode field: 3 Hypervisor State (HV) -field: 45 Power Management Enable (POW) -field: 47 Little-Endian Exception Mode (ILE) +field: 38 Vector Available (VEC) field: 48 External Interrupt Enable (EE) field: 49 Problem State (PR) value: 0 privileged state @@ -97,3 +95,39 @@ field: 30 Recoverable Interrupt (RI) field: 31 Little-Endian Mode (LE) value: 0 big-endian value: 1 little-endian + +; POWER ISA(tm) Book III-S +; Section 5.7.6.1 Page Table + +[PTE_V] +name: Page Table Entry, Dword 0 +field: 0:1 Segment Size (B) +value: 0 256MB +value: 1 1TB +value: 2 reserved +value: 3 reserved +field: 2:56 Abbreviated Virtual Page Number (AVPN) +field: 57:60 Software bits (SW) +field: 61 Virtual page size (L) +value: 0 4KB +value: 1 large page +field: 62 Hash function identifier (H) +field: 63 Valid (V) + +[PTE_R] +name: Page Table Entry, Dword 1 +field: 2:43 Appreviated Real Page Number (ARPN) +field: 44:51 Large page size selector (LP) +field: 54 Address Compare bit (AC) +field: 55 Reference bit (R) +field: 56 Change bit (C) +field: 57 Storage control bit (W) +field: 58 Storage control bit (I) +field: 59 Storage control bit (M) +field: 60 Storage control bit (G) +field: 61 No-execute page (N) +field: 62:63 Page protection bits (PP) +value: 0 Key=0 read/write K=1 no access +value: 1 Key=0 read/write K=1 read only +value: 2 Key=0 read/write K=1 read/write +value: 3 Key=0 read only K=1 read only -- 2.39.2