From 0102b1f4598413759d0cea50a165a4dd5b487b28 Mon Sep 17 00:00:00 2001 From: Jeremy Kerr Date: Tue, 9 Jan 2007 16:37:06 +1100 Subject: [PATCH] Added 32-bit MSR to powerpc definitions Signed-off-by: Jeremy Kerr --- conf/powerpc.conf | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/conf/powerpc.conf b/conf/powerpc.conf index 1303d93..8e124cc 100644 --- a/conf/powerpc.conf +++ b/conf/powerpc.conf @@ -2,6 +2,7 @@ ; ; Contributors: ; Michael Neuling +; Jeremy Kerr ; ; Taken from: ; PowerPC® Microprocessor Family: @@ -67,3 +68,32 @@ field: 56 Class (C) value: 0 big-endian value: 1 little-endian + +; The PowerPC Architecture: +; A Specification For A New Family Of RISC Processors +; Book III PowerPC Operating Environment Architecture + +; Section 2.2.3 Machine State Register (MSR) +[MSR_32] +name: PowerPC Machine State Register +field: 13 Power Management Enable (POW) +field: 15 Little-Endian Exception Mode (ILE) +field: 16 External Interrupt Enable (EE) +field: 17 Problem State (PR) +value: 0 privileged state +value: 1 problem state +field: 18 Floating-Point Available (FP) +field: 19 Machine Check Interrupt Enable (ME) +field: 20,23 Floating-Point Exception Mode (FE) +value: 0 ignore exceptions +value: 1 imprecise nonrecoverable +value: 2 imprecise recoverable +value: 3 precise +field: 21 Single-Step Trace Enable (SE) +field: 22 Branch Trace Enable (BE) +field: 26 Instruction Relocate (IR) +field: 27 Data Relocate (DR) +field: 30 Recoverable Interrupt (RI) +field: 31 Little-Endian Mode (LE) +value: 0 big-endian +value: 1 little-endian -- 2.39.2