-#!/usr/bin/python2.4
+#!/usr/bin/env python
#
# Utility to decode register values
# Copyright (c) 2006 Jeremy Kerr <jk@ozlabs.org>
return len(self.bits)
def add_value(self, value, description):
- self.values[int(value)] = description
+ self.values[int(value, 0)] = description
- def mask(self, reg_width, value):
+ def mask(self, reg, value):
ret = 0
out_len = len(self.bits)
- for out_bit in range(0, out_len):
- in_bit = self.bits[out_bit]
+
+ if reg.bit_order == reg.bit_0_is_msb:
+ bit_pairs = zip(self.bits, range(0, out_len))
+ else:
+ bit_pairs = zip(self.bits, range(out_len - 1, -1, -1))
+
+ for (in_bit, out_bit) in bit_pairs:
# shift this bit down to the LSB (and mask the rest)
- i = (value >> (reg_width - in_bit - 1)) & 1
+ i = (value >> (reg.width - in_bit - 1)) & 1
# shift back to the output position in the field
i <<= out_len - out_bit - 1
ret |= i
val = mask << shift
for i in range(0, width):
if mask & (1 << i):
- bits.append(width - i - 1 - shift)
+ bits.insert(0, width - i - 1 - shift)
return bits
+ @staticmethod
+ def mask_to_bits(width, mask):
+ return bitfield.mask_and_shift_to_bits(width, mask, 0)
+
@staticmethod
def parse_bitfield(line, reg):
a = line.split(None, 1)
(start, end) = map( \
lambda s: reg.bit_number(int(s)),
s.split(':'))
- start = reg.bit_number(int(start))
- end = reg.bit_number(int(end))
- bits.extend(range(start, end + 1, 1))
+ bits.extend(range(start, end - 1, -1))
elif '<<' in s:
(mask, shift) = map(lambda s: int(s.strip()),
s.split('<<'))
bits.extend(bitfield.mask_and_shift_to_bits( \
reg.width, mask, shift))
+ elif s.startswith('&'):
+ mask = int(s[1:], 0)
+ bits.extend(bitfield.mask_to_bits(reg.width, \
+ mask))
else:
bits.append(reg.bit_number(int(s)))
-
+
return bitfield(bits, name)
str = "0x%0*lx [%d]\n" % (field_width, value, value)
for field in self.fields:
- v = field.mask(self.width, value);
+ v = field.mask(self, value);
if ignore_zero and v == 0:
continue
desc = field.value(v)
str += "%*s: 0x%x\n" \
% (name_width, field.name, v)
return str
-
+
def bit_number(self, number):
if self.bit_order == self.bit_0_is_lsb:
- number = self.width - 1 - number
+ number = self.width - number - 1
return number
def list_regs(regs):
"Invalid bit order %s in %s" % \
(order_str, id))
reg.bit_order = order_map[order_str]
-
+
elif t[0] == 'alias':
alias_id = t[1].strip()
value_iter = args.__iter__()
else:
value_iter = iter(sys.stdin.readline, '')
-
+
try:
for value in value_iter:
decode_value(reg, value.strip(), options)