Fix bit-0-is-lsb ordering

[bitfield] / ChangeLog

diff --git a/ChangeLog b/ChangeLog
index f4d5b81c39ca08af3f59ab372d6182ea691e56c1..094262f37d4d2ae22ab85040230dcfca85312835 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+version ??
+       * Add support for &mask syntax
+       * Allow alternate (bit 0 is lsb) bit numbering scheme
+       * Add support for mask<<shift field definitions
+       * Add configuration for a few radeon registers
+
 version 0.2:
        * Add support for aliased definitions.
        * Reorder configuration file reading order.