bitfield: Fix MSR_32 to give the right width

[bitfield] / ChangeLog

diff --git a/ChangeLog b/ChangeLog
index 0d9feae647ba492da70e88fe89a475a9d9d1e425..094262f37d4d2ae22ab85040230dcfca85312835 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,4 +1,5 @@
 version ??
+       * Add support for &mask syntax
        * Allow alternate (bit 0 is lsb) bit numbering scheme
        * Add support for mask<<shift field definitions
        * Add configuration for a few radeon registers