X-Git-Url: https://git.ozlabs.org/?a=blobdiff_plain;f=ccan%2Fcpuid%2Fcpuid.h;h=5de2ed157be15becafcb7ec488754d98e3cddf90;hb=5d628b63760d38f7d5094141d019f4ab83546690;hp=d5efb3f55b805787e8f6fc2895908956fb4a2625;hpb=92b6e205441e5ead73b1dba53e8431aa1002086c;p=ccan diff --git a/ccan/cpuid/cpuid.h b/ccan/cpuid/cpuid.h index d5efb3f5..5de2ed15 100644 --- a/ccan/cpuid/cpuid.h +++ b/ccan/cpuid/cpuid.h @@ -30,50 +30,52 @@ * * This is used as a parameter in cpuid(). * - * CPU_VENDORID: + * CPUID_VENDORID: * The CPU's Vendor ID. * - * CPU_PROCINFO_AND_FEATUREBITS: + * CPUID_PROCINFO_AND_FEATUREBITS: * Processor information and feature bits (SSE, etc.). * - * CPU_CACHE_AND_TLBD_INFO + * CPUID_CACHE_AND_TLBD_INFO * Cache and TLBD Information. + * For AMD: Use CPUID_EXTENDED_L2_CACHE_FEATURES * - * CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: + * CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: * Highest extended function supported address. * Can be like 0x80000008. * - * CPU_EXTENDED_PROC_INFO_FEATURE_BITS: + * CPUID_EXTENDED_PROC_INFO_FEATURE_BITS: * Extended processor information and feature bits (64bit etc.) * - * CPU_PROC_BRAND_STRING: + * CPUID_PROC_BRAND_STRING: * The Processor's brand string. * - * CPU_L1_CACHE_AND_TLB_IDS: + * CPUID_L1_CACHE_AND_TLB_IDS: * L1 Cache and TLB Identifications. + * AMD Only. * - * CPU_EXTENDED_L2_CACHE_FEATURES: + * CPUID_EXTENDED_L2_CACHE_FEATURES: * Extended L2 Cache features. * - * CPU_ADV_POWER_MGT_INFO: + * CPUID_ADV_POWER_MGT_INFO: * Advaned power management information. * - * CPU_VIRT_PHYS_ADDR_SIZES: + * CPUID_VIRT_PHYS_ADDR_SIZES: * Virtual and physical address sizes. */ typedef enum cpuid { - CPU_VENDORID = 0, - CPU_PROCINFO_AND_FEATUREBITS = 1, - CPU_CACHE_AND_TLBD_INFO = 2, + CPUID_VENDORID = 0, + CPUID_PROCINFO_AND_FEATUREBITS = 1, + CPUID_CACHE_AND_TLBD_INFO = 2, - CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED = 0x80000000, - CPU_EXTENDED_PROC_INFO_FEATURE_BITS = 0x80000001, - CPU_PROC_BRAND_STRING = 0x80000002, - CPU_L1_CACHE_AND_TLB_IDS = 0x80000005, - CPU_EXTENDED_L2_CACHE_FEATURES = 0x80000006, - CPU_ADV_POWER_MGT_INFO = 0x80000007, - CPU_VIRT_PHYS_ADDR_SIZES = 0x80000008 + CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED = 0x80000000, + CPUID_EXTENDED_PROC_INFO_FEATURE_BITS = 0x80000001, + CPUID_PROC_BRAND_STRING = 0x80000002, + CPUID_L1_CACHE_AND_TLB_IDS = 0x80000005, + CPUID_EXTENDED_L2_CACHE_FEATURES = 0x80000006, + CPUID_ADV_POWER_MGT_INFO = 0x80000007, + CPUID_VIRT_PHYS_ADDR_SIZES = 0x80000008 } cpuid_t; enum { @@ -193,7 +195,7 @@ bool cpuid_is_supported(void); * Returns the highest extended function supported. * * This is the same as calling: - * cpuid(CPU_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest); + * cpuid(CPUID_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest); * * This is made visible to the linker because it's easier to call it * instead of calling cpuid with less type-checking. cpuid calls this. @@ -208,60 +210,60 @@ uint32_t cpuid_highest_ext_func_supported(void); * This function expects buf to be a valid pointer to a string/int/... * depending on the requested information. * - * For CPU_VENDOR_ID: + * For CPUID_VENDOR_ID: * Returns a string into buf. * - * For CPU_PROCINFO_AND_FEATUREBITS: + * For CPUID_PROCINFO_AND_FEATUREBITS: * buf[0]: Stepping * buf[1]: Model * buf[2]: Family * buf[3]: Extended Model * buf[4]: Extended Family - * buf[5] and buf[6]: - * Feature flags - * buf[7]: Brand Index - * buf[8]: CL Flush Line Size - * buf[9]: Logical Processors - * buf[10]: Initial APICID - * - * For CPU_L1_CACHE_AND_TLB_IDS: - * buf[0]: (eax): - * - 7..0 Number of times to exec cpuid to get all descriptors. - * - 15..8 Instruction TLB: 4K Pages, 4-way set associtive, 128 entries. - * - 23..16 Data TLB: 4k Pages, 4-way set associtive, 128 entries. - * - 24..31 Instruction TLB: 4K Pages, 4-way set associtive, 2 entries. - * buf[1]: (ebx): - * - 7..0 64-byte prefetching - * - 8..31 Null descriptor - * buf[2]: (ecx): - * - 0..31 Null descriptor - * buf[3]: (edx): - * - 7..0 2nd-level cache, 2M, 8-way set associtive, 64-byte line size - * - 15..8 1st-level instruction cache: 32K, 8-way set associtive, 64 byte line size - * - 16..23 Data TLB: 4M Pages, 4-way set associtive, 8 entires. - * - 24..31 1st-level data cache: 32K, 8-way set associtive, 64 byte line size - * - * For CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: + * buf[5]: Brand Index + * buf[6]: CL Flush Line Size + * buf[7]: Logical Processors + * buf[8]: Initial APICID + * + * For CPUID_L1_CACHE_AND_TLB_IDS: + * buf[0] to buf[3]: 2M+4M page TLB info + * 0: Inst count + * 1: Inst Assoc + * 2: Data Count + * 3: Data Assoc + * buf[4] to buf[7]: 4k page TLB info + * 0: Inst count + * 1: Inst Assoc + * 2: Data Count + * 3: Data Assoc + * buf[8] to buf[11]: L1 data cache information + * 0: Line Size + * 1: LinesPerTag + * 2: Associativity + * 3: CacheSize + * buf[12] to buf[15]: L1 instruction cache info + * 0: Line Size + * 1: LinesPerTag + * 2: Associativity + * 3: CacheSize + * + * For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: * Returns the highest supported function in *buf (expects an integer ofc) * - * For CPU_EXTENDED_PROC_INFO_FEATURE_BITS: + * For CPUID_EXTENDED_PROC_INFO_FEATURE_BITS: * Returns them in buf[0] and buf[1]. * - * For CPU_EXTENDED_L2_CACHE_FEATURES: + * For CPUID_EXTENDED_L2_CACHE_FEATURES: * buf[0]: Line size * buf[1]: Associativity * buf[2]: Cache size. * - * For CPU_VIRT_PHYS_ADDR_SIZES: + * For CPUID_VIRT_PHYS_ADDR_SIZES: * buf[0]: Physical * buf[1]: Virtual * - * For CPU_PROC_BRAND_STRING: + * For CPUID_PROC_BRAND_STRING: * Have a char array with at least 48 bytes assigned to it. * - * Here's a page which will help you parse the data provided by this function. - * http://www.flounder.com/cpuid_explorer2.htm - * * If an invalid flag has been passed a 0xbaadf00d is returned in *buf. */ void cpuid(cpuid_t info, uint32_t *buf); @@ -271,8 +273,8 @@ void cpuid(cpuid_t info, uint32_t *buf); * * Returns true if feature is supported, false otherwise. * - * The feature parameter must be >= CPU_EXTENDED_PROC_INFO_FEATURE_BITS - * and <= CPU_VIRT_PHYS_ADDR_SIZES. + * The feature parameter must be >= CPUID_EXTENDED_PROC_INFO_FEATURE_BITS + * and <= CPUID_VIRT_PHYS_ADDR_SIZES. */ bool cpuid_test_feature(cpuid_t feature); @@ -299,7 +301,8 @@ bool cpuid_has_edxfeature(int feature); #define cpuid_highest_ext_func_supported() BUILD_ASSERT_OR_ZERO(0) #define cpuid_test_feature(feature) BUILD_ASSERT_OR_ZERO(0) -#define cpuid_has_feature(feature, ext) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_has_ecxfeature(feature) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_has_edxfeature(feature) BUILD_ASSERT_OR_ZERO(0) #endif #endif