X-Git-Url: https://git.ozlabs.org/?a=blobdiff_plain;f=ccan%2Fcpuid%2Fcpuid.c;h=df9b4aafc530268f96280e9bf52260c7477765dc;hb=715de3cf272d057e176d032986db45d2270494fc;hp=35e0b7ae8d779b8f371f4707d621db270146e304;hpb=9c0951e6f63564cf6c655680fd518c37e666bd78;p=ccan

diff --git a/ccan/cpuid/cpuid.c b/ccan/cpuid/cpuid.c
index 35e0b7ae..df9b4aaf 100644
--- a/ccan/cpuid/cpuid.c
+++ b/ccan/cpuid/cpuid.c
@@ -92,6 +92,8 @@ static struct {
 
 bool cpuid_is_supported(void)
 {
+	int ret = 0;
+#if defined(__GNUC__) || defined(__clang__)
 	/* The following assembly code uses EAX as the return value,
 	 * but we store the value of EAX into ret since GCC uses EAX
 	 * as the return register for every C function.  That's a double
@@ -124,7 +126,6 @@ bool cpuid_is_supported(void)
 #define ASM_PUSHECX 	"pushl %%ecx\n\t"
 #endif
 
-	int ret = 0;
 	asm volatile(
 		ASM_PUSHF
 		ASM_POPEAX
@@ -147,7 +148,26 @@ bool cpuid_is_supported(void)
 #undef ASM_PUSHEAX
 #undef ASM_POPEAX
 #undef ASM_PUSHECX
-
+#elif defined _MSC_VER
+	__asm {
+		pushfd
+		pop eax
+		mov ecx, eax
+		xor eax, 0x200000
+		push eax
+		popfd
+
+		pushfd
+		pop eax
+		xor eax, ecx
+		shr eax, 21
+		and eax, 1
+		push ecx
+		popfd
+
+		mov eax, ret
+	};
+#endif
 	return !!ret;
 }
 
@@ -220,9 +240,14 @@ cputype_t cpuid_get_cpu_type(void)
 	return cputype;
 }
 
-const char *cpuid_get_cpu_type_string(const cputype_t cputype)
+bool cpuid_sprintf_cputype(const cputype_t cputype, char *buf)
 {
-	return cpuids[(int)cputype];
+	if (cputype == CT_NONE)
+		return false;
+
+	memcpy(buf, cpuids[(int)cputype], 12);
+	buf[12] = '\0';
+	return true;
 }
 
 uint32_t cpuid_highest_ext_func_supported(void)
@@ -230,11 +255,19 @@ uint32_t cpuid_highest_ext_func_supported(void)
 	static uint32_t highest;
 
 	if (!highest) {
+#if defined(__GNUC__) || defined(__clang__)
 		asm volatile(
 			"cpuid\n\t"
 			: "=a" (highest)
 			: "a" (CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED)
 		);
+#elif defined _MSC_VER
+		__asm {
+			mov eax, CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED
+			cpuid
+			mov highest, eax
+		};
+#endif
 	}
 
 	return highest;
@@ -276,10 +309,20 @@ void cpuid(cpuid_t info, uint32_t *buf)
 			buf[2] = ecx;
 			break;
 		case CPU_PROCINFO_AND_FEATUREBITS:
-			buf[0] = eax; 	/* The so called "signature" of the CPU.  */
-			buf[1] = edx; 	/* Feature flags #1.  */
-			buf[2] = ecx; 	/* Feature flags #2.  */
-			buf[3] = ebx; 	/* Additional feature information.  */
+			buf[0] = (eax & 0x0F);		/* Stepping  */
+			buf[1] = (eax >> 4)  & 0x0F; 	/* Model  */
+			buf[2] = (eax >> 8)  & 0x0F; 	/* Family  */
+			buf[3] = (eax >> 16) & 0x0F; 	/* Extended Model.  */
+			buf[4] = (eax >> 24) & 0x0F; 	/* Extended Family.  */
+
+			buf[5] = edx; 			/* Feature flags #1.  */
+			buf[6] = ecx; 			/* Feature flags #2.  */
+
+			/* Additional Feature information.  */
+			buf[7] = ebx & 0xFF;
+			buf[8] = (ebx >> 8) & 0xFF;
+			buf[9] = (ebx >> 16) & 0xFF;
+			buf[10] = (ebx >> 24) & 0xFF;
 			break;
 		case CPU_CACHE_AND_TLBD_INFO:
 			buf[0] = eax;
@@ -298,13 +341,16 @@ void cpuid(cpuid_t info, uint32_t *buf)
 			buf[3] = edx;
 			break;
 		case CPU_EXTENDED_L2_CACHE_FEATURES:
-			*buf = ecx;
+			buf[0] = ecx & 0xFF; 		/* Line size.  */
+			buf[1] = (ecx >> 12) & 0xFF; 	/* Associativity.  */
+			buf[2] = ecx >> 16; 		/* Cache size.  */
 			break;
 		case CPU_ADV_POWER_MGT_INFO:
 			*buf = edx;
 			break;
 		case CPU_VIRT_PHYS_ADDR_SIZES:
-			*buf = eax;
+			buf[0] = eax & 0xFF; 		/* physical.  */
+			buf[1] = (eax >> 8) & 0xFF; 	/* virtual.  */
 			break;
 		default:
 			*buf = 0xbaadf00d;