/*
- * Copyright (c) 2013 Ahmed Samy <f.fallen45@gmail.com>
+ * Copyright (c) 2013, 2015 Ahmed Samy <f.fallen45@gmail.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
#include <stdbool.h>
#include <stdint.h>
+#include <stdio.h>
/**
* enum cpuid - stuff to get information about from the CPU.
*
* This is used as a parameter in cpuid().
*
- * CPU_VENDORID:
+ * %CPUID_VENDORID:
* The CPU's Vendor ID.
*
- * CPU_PROCINFO_AND_FEATUREBITS:
+ * %CPUID_PROCINFO_AND_FEATUREBITS:
* Processor information and feature bits (SSE, etc.).
*
- * CPU_CACHE_AND_TLBD_INFO
+ * %CPUID_CACHE_AND_TLBD_INFO
* Cache and TLBD Information.
+ * For AMD: Use CPUID_EXTENDED_L2_CACHE_FEATURES
*
- * CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
+ * %CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
* Highest extended function supported address.
* Can be like 0x80000008.
*
- * CPU_EXTENDED_PROC_INFO_FEATURE_BITS:
+ * %CPUID_EXTENDED_PROC_INFO_FEATURE_BITS:
* Extended processor information and feature bits (64bit etc.)
*
- * CPU_PROC_BRAND_STRING:
+ * %CPUID_PROC_BRAND_STRING:
* The Processor's brand string.
*
- * CPU_L1_CACHE_AND_TLB_IDS:
+ * %CPUID_L1_CACHE_AND_TLB_IDS:
* L1 Cache and TLB Identifications.
+ * AMD Only.
*
- * CPU_EXTENDED_L2_CACHE_FEATURES:
+ * %CPUID_EXTENDED_L2_CACHE_FEATURES:
* Extended L2 Cache features.
*
- * CPU_ADV_POWER_MGT_INFO:
+ * %CPUID_ADV_POWER_MGT_INFO:
* Advaned power management information.
*
- * CPU_VIRT_PHYS_ADDR_SIZES:
+ * %CPUID_VIRT_PHYS_ADDR_SIZES:
* Virtual and physical address sizes.
*/
typedef enum cpuid {
- CPU_VENDORID = 0,
- CPU_PROCINFO_AND_FEATUREBITS = 1,
- CPU_CACHE_AND_TLBD_INFO = 2,
+ CPUID_VENDORID = 0,
+ CPUID_PROCINFO_AND_FEATUREBITS = 1,
+ CPUID_CACHE_AND_TLBD_INFO = 2,
- CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED = 0x80000000,
- CPU_EXTENDED_PROC_INFO_FEATURE_BITS = 0x80000001,
- CPU_PROC_BRAND_STRING = 0x80000002,
- CPU_L1_CACHE_AND_TLB_IDS = 0x80000005,
- CPU_EXTENDED_L2_CACHE_FEATURES = 0x80000006,
- CPU_ADV_POWER_MGT_INFO = 0x80000007,
- CPU_VIRT_PHYS_ADDR_SIZES = 0x80000008
+ CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED = 0x80000000,
+ CPUID_EXTENDED_PROC_INFO_FEATURE_BITS = 0x80000001,
+ CPUID_PROC_BRAND_STRING = 0x80000002,
+ CPUID_L1_CACHE_AND_TLB_IDS = 0x80000005,
+ CPUID_EXTENDED_L2_CACHE_FEATURES = 0x80000006,
+ CPUID_ADV_POWER_MGT_INFO = 0x80000007,
+ CPUID_VIRT_PHYS_ADDR_SIZES = 0x80000008
} cpuid_t;
enum {
CPUID_FEAT_ECX_OSXSAVE = 1 << 27,
CPUID_FEAT_ECX_AVX = 1 << 28,
+ CPUID_FEAT_ECX_ALL = CPUID_FEAT_ECX_SSE3 | CPUID_FEAT_ECX_PCLMUL | CPUID_FEAT_ECX_DTES64
+ | CPUID_FEAT_ECX_MONITOR | CPUID_FEAT_ECX_DS_CPL | CPUID_FEAT_ECX_VMX
+ | CPUID_FEAT_ECX_SMX | CPUID_FEAT_ECX_EST | CPUID_FEAT_ECX_TM2
+ | CPUID_FEAT_ECX_SSSE3 | CPUID_FEAT_ECX_CID | CPUID_FEAT_ECX_FMA
+ | CPUID_FEAT_ECX_CX16 | CPUID_FEAT_ECX_ETPRD | CPUID_FEAT_ECX_PDCM
+ | CPUID_FEAT_ECX_DCA | CPUID_FEAT_ECX_SSE4_1 | CPUID_FEAT_ECX_SSE4_2
+ | CPUID_FEAT_ECX_x2APIC | CPUID_FEAT_ECX_MOVBE | CPUID_FEAT_ECX_POPCNT
+ | CPUID_FEAT_ECX_AES | CPUID_FEAT_ECX_XSAVE | CPUID_FEAT_ECX_OSXSAVE
+ | CPUID_FEAT_ECX_AVX,
+
CPUID_FEAT_EDX_FPU = 1 << 0,
CPUID_FEAT_EDX_VME = 1 << 1,
CPUID_FEAT_EDX_DE = 1 << 2,
CPUID_FEAT_EDX_HTT = 1 << 28,
CPUID_FEAT_EDX_TM1 = 1 << 29,
CPUID_FEAT_EDX_IA64 = 1 << 30,
- CPUID_FEAT_EDX_PBE = 1 << 31
+ CPUID_FEAT_EDX_PBE = 1 << 31,
+
+ CPUID_FEAT_EDX_ALL = CPUID_FEAT_EDX_FPU | CPUID_FEAT_EDX_VME | CPUID_FEAT_EDX_DE
+ | CPUID_FEAT_EDX_PSE | CPUID_FEAT_EDX_TSC | CPUID_FEAT_EDX_MSR
+ | CPUID_FEAT_EDX_PAE | CPUID_FEAT_EDX_MCE | CPUID_FEAT_EDX_CX8
+ | CPUID_FEAT_EDX_APIC | CPUID_FEAT_EDX_SEP | CPUID_FEAT_EDX_MTRR
+ | CPUID_FEAT_EDX_PGE | CPUID_FEAT_EDX_MCA | CPUID_FEAT_EDX_CMOV
+ | CPUID_FEAT_EDX_PAT | CPUID_FEAT_EDX_PSE36 | CPUID_FEAT_EDX_PSN
+ | CPUID_FEAT_EDX_CLF | CPUID_FEAT_EDX_DTES | CPUID_FEAT_EDX_ACPI
+ | CPUID_FEAT_EDX_MMX | CPUID_FEAT_EDX_FXSR | CPUID_FEAT_EDX_SSE
+ | CPUID_FEAT_EDX_SSE2 | CPUID_FEAT_EDX_SS | CPUID_FEAT_EDX_HTT
+ | CPUID_FEAT_EDX_TM1 | CPUID_FEAT_EDX_IA64 | CPUID_FEAT_EDX_PBE
+};
+
+enum {
+ CPUID_EXTFEAT_ECX_LAHF_LM = 1 << 0,
+ CPUID_EXTFEAT_ECX_CMP_LEGACY = 1 << 1,
+ CPUID_EXTFEAT_ECX_SVM = 1 << 2,
+ CPUID_EXTFEAT_ECX_EXTAPIC = 1 << 3,
+ CPUID_EXTFEAT_ECX_CR8_LEGACY = 1 << 4,
+ CPUID_EXTFEAT_ECX_ABM = 1 << 5,
+ CPUID_EXTFEAT_ECX_SSE4A = 1 << 6,
+ CPUID_EXTFEAT_ECX_MISALIGNSSE = 1 << 7,
+ CPUID_EXTFEAT_ECX_3DNOWPREFETCH = 1 << 8,
+ CPUID_EXTFEAT_ECX_OSVW = 1 << 9,
+ CPUID_EXTFEAT_ECX_IBS = 1 << 10,
+ CPUID_EXTFEAT_ECX_XOP = 1 << 11,
+ CPUID_EXTFEAT_ECX_SKINIT = 1 << 12,
+ CPUID_EXTFEAT_ECX_WDT = 1 << 13,
+ CPUID_EXTFEAT_ECX_LWP = 1 << 15,
+ CPUID_EXTFEAT_ECX_FMA4 = 1 << 16,
+ CPUID_EXTFEAT_ECX_TCE = 1 << 17,
+ CPUID_EXTFEAT_ECX_NODEIDE_MSR = 1 << 19,
+ CPUID_EXTFEAT_ECX_TBM = 1 << 21,
+ CPUID_EXTFEAT_ECX_TOPOEXT = 1 << 22,
+ CPUID_EXTFEAT_ECX_PERFXTR_CORE = 1 << 23,
+ CPUID_EXTFEAT_ECX_PERFCTR_NB = 1 << 24,
+
+ CPUID_EXTFEAT_EDX_FPU = 1 << 0,
+ CPUID_EXTFEAT_EDX_VME = 1 << 1,
+ CPUID_EXTFEAT_EDX_DE = 1 << 2,
+ CPUID_EXTFEAT_EDX_PSE = 1 << 3,
+ CPUID_EXTFEAT_EDX_TSC = 1 << 4,
+ CPUID_EXTFEAT_EDX_MSR = 1 << 5,
+ CPUID_EXTFEAT_EDX_PAE = 1 << 6,
+ CPUID_EXTFEAT_EDX_MCE = 1 << 7,
+ CPUID_EXTFEAT_EDX_CX8 = 1 << 8,
+ CPUID_EXTFEAT_EDX_APIC = 1 << 9,
+ CPUID_EXTFEAT_EDX_SYSCALL = 1 << 11,
+ CPUID_EXTFEAT_EDX_MTRR = 1 << 12,
+ CPUID_EXTFEAT_EDX_PGE = 1 << 13,
+ CPUID_EXTFEAT_EDX_MCA = 1 << 14,
+ CPUID_EXTFEAT_EDX_CMOV = 1 << 15,
+ CPUID_EXTFEAT_EDX_PAT = 1 << 16,
+ CPUID_EXTFEAT_EDX_PSE36 = 1 << 17,
+ CPUID_EXTFEAT_EDX_MP = 1 << 19,
+ CPUID_EXTFEAT_EDX_NX = 1 << 20,
+ CPUID_EXTFEAT_EDX_MMXEXT = 1 << 22,
+ CPUID_EXTFEAT_EDX_MMX = 1 << 23,
+ CPUID_EXTFEAT_EDX_FXSR = 1 << 24,
+ CPUID_EXTFEAT_EDX_FXSR_OPT = 1 << 25,
+ CPUID_EXTFEAT_EDX_PDPE1GB = 1 << 26,
+ CPUID_EXTFEAT_EDX_RDTSCP = 1 << 27,
+ CPUID_EXTFEAT_EDX_LM = 1 << 29,
+ CPUID_EXTFEAT_EDX_3DNOWEXT = 1 << 30,
+ CPUID_EXTFEAT_EDX_3DNOW = 1 << 31
};
typedef enum cputype {
CT_KVM
} cputype_t;
+static char const *const c_cpunames[] = {
+ "Nooooooooone",
+ "AMDisbetter!",
+ "AuthenticAMD",
+ "CentaurHauls",
+ "CyrixInstead",
+ "GenuineIntel",
+ "TransmetaCPU",
+ "GeniuneTMx86",
+ "Geode by NSC",
+ "NexGenDriven",
+ "RiseRiseRise",
+ "SiS SiS SiS ",
+ "UMC UMC UMC ",
+ "VIA VIA VIA ",
+ "Vortex86 SoC",
+ "KVMKVMKVMKVM"
+};
+
#if defined(__i386__) || defined(__i386) || defined(__x86_64) \
|| defined(_M_AMD64) || defined(__M_X64)
*
* Returns the CPU Type as cputype_t.
*
- * See also: cpuid_get_cpu_type_string()
+ * See also: cpuid_get_name()
*/
-#define is_intel_cpu() cpuid_get_cpu_type() == CT_INTEL
-#define is_amd_cpu() cpuid_get_cpu_type() == CT_AMDK5 || cpuid_get_cpu_type() == CT_AMD
cputype_t cpuid_get_cpu_type(void);
-/**
- * cpuid_sprintf_cputype - Get CPU Type string
- * @cputype: a char of atleast 12 bytes in it.
- *
- * Returns true on success, false on failure
- */
-bool cpuid_sprintf_cputype(const cputype_t cputype, char *buf);
+static inline bool cpuid_is_intel(void)
+{
+ return cpuid_get_cpu_type() == CT_INTEL;
+}
+
+static inline bool cpuid_is_amd(void)
+{
+ return cpuid_get_cpu_type() == CT_AMDK5 || cpuid_get_cpu_type() == CT_AMD;
+}
+
+static inline const char *cpuid_get_name(void)
+{
+ return c_cpunames[(int)cpuid_get_cpu_type()];
+}
/**
* cpuid_is_supported - test if the CPUID instruction is supported
* Returns the highest extended function supported.
*
* This is the same as calling:
- * cpuid(CPU_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest);
+ * cpuid(CPUID_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest);
*
* This is made visible to the linker because it's easier to call it
* instead of calling cpuid with less type-checking. cpuid calls this.
/**
* cpuid - Get Some information from the CPU.
+ * @request: a cpuid_t
+ * @buf: output
*
* This function expects buf to be a valid pointer to a string/int/...
* depending on the requested information.
*
- * For CPU_VENDOR_ID:
+ * For CPUID_VENDOR_ID:
* Returns a string into buf.
*
- * For CPU_PROCINFO_AND_FEATUREBITS:
+ * For CPUID_PROCINFO_AND_FEATUREBITS:
* buf[0]: Stepping
* buf[1]: Model
* buf[2]: Family
* buf[3]: Extended Model
* buf[4]: Extended Family
- * buf[5] and buf[6]:
- * Feature flags
- * buf[7]: Brand Index
- * buf[8]: CL Flush Line Size
- * buf[9]: Logical Processors
- * buf[10]: Initial APICID
- *
- * For CPU_L1_CACHE_AND_TLB_IDS:
- * buf[0]: (eax):
- * - 7..0 Number of times to exec cpuid to get all descriptors.
- * - 15..8 Instruction TLB: 4K Pages, 4-way set associtive, 128 entries.
- * - 23..16 Data TLB: 4k Pages, 4-way set associtive, 128 entries.
- * - 24..31 Instruction TLB: 4K Pages, 4-way set associtive, 2 entries.
- * buf[1]: (ebx):
- * - 7..0 64-byte prefetching
- * - 8..31 Null descriptor
- * buf[2]: (ecx):
- * - 0..31 Null descriptor
- * buf[3]: (edx):
- * - 7..0 2nd-level cache, 2M, 8-way set associtive, 64-byte line size
- * - 15..8 1st-level instruction cache: 32K, 8-way set associtive, 64 byte line size
- * - 16..23 Data TLB: 4M Pages, 4-way set associtive, 8 entires.
- * - 24..31 1st-level data cache: 32K, 8-way set associtive, 64 byte line size
- *
- * For CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
+ * buf[5]: Brand Index
+ * buf[6]: CL Flush Line Size
+ * buf[7]: Logical Processors
+ * buf[8]: Initial APICID
+ *
+ * For CPUID_L1_CACHE_AND_TLB_IDS:
+ * buf[0] to buf[3]: 2M+4M page TLB info
+ * 0: Inst count
+ * 1: Inst Assoc
+ * 2: Data Count
+ * 3: Data Assoc
+ * buf[4] to buf[7]: 4k page TLB info
+ * 0: Inst count
+ * 1: Inst Assoc
+ * 2: Data Count
+ * 3: Data Assoc
+ * buf[8] to buf[11]: L1 data cache information
+ * 0: Line Size
+ * 1: LinesPerTag
+ * 2: Associativity
+ * 3: CacheSize
+ * buf[12] to buf[15]: L1 instruction cache info
+ * 0: Line Size
+ * 1: LinesPerTag
+ * 2: Associativity
+ * 3: CacheSize
+ *
+ * For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
* Returns the highest supported function in *buf (expects an integer ofc)
*
- * For CPU_EXTENDED_PROC_INFO_FEATURE_BITS:
+ * For CPUID_EXTENDED_PROC_INFO_FEATURE_BITS:
* Returns them in buf[0] and buf[1].
*
- * For CPU_EXTENDED_L2_CACHE_FEATURES:
+ * For CPUID_EXTENDED_L2_CACHE_FEATURES:
* buf[0]: Line size
* buf[1]: Associativity
* buf[2]: Cache size.
*
- * For CPU_VIRT_PHYS_ADDR_SIZES:
+ * For CPUID_VIRT_PHYS_ADDR_SIZES:
* buf[0]: Physical
* buf[1]: Virtual
*
- * For CPU_PROC_BRAND_STRING:
+ * For CPUID_PROC_BRAND_STRING:
* Have a char array with at least 48 bytes assigned to it.
*
- * Here's a page which will help you parse the data provided by this function.
- * http://www.flounder.com/cpuid_explorer2.htm
- *
- * If an invalid flag has been passed a 0xbaadf00d is returned in *buf.
+ * If an invalid request has been passed a 0xbaadf00d is returned in *buf.
+ */
+void cpuid(cpuid_t request, uint32_t *buf);
+
+/**
+ * cpuid_write_info - Write specified CPU information to a file.
+ * @info: Bit set of information to write.
+ * @featureset: Bit set of features to write.
+ * @outfile: Output file pointer
+ *
+ * Returns true on success, false otherwise.
+ *
+ * Example usage:
+ * if (!cpuid_write_info(CPUID_VENDORID | CPUID_PROC_BRAND_STRING,
+ * CPUID_FEAT_ECX_SSE3 | CPUID_FEAT_EDX_FPU,
+ * fp))
+ * ... error ...
*/
-void cpuid(cpuid_t info, uint32_t *buf);
+bool cpuid_write_info(uint32_t info, uint32_t featureset, FILE *outfile);
/**
* cpuid_test_feature - Test if @feature is available
*
* Returns true if feature is supported, false otherwise.
*
- * The feature parameter must be >= CPU_EXTENDED_PROC_INFO_FEATURE_BITS
- * and <= CPU_VIRT_PHYS_ADDR_SIZES.
+ * The feature parameter must be >= CPUID_EXTENDED_PROC_INFO_FEATURE_BITS
+ * and <= CPUID_VIRT_PHYS_ADDR_SIZES.
*/
bool cpuid_test_feature(cpuid_t feature);
* cpuid_has_feature - Test if @feature is supported
*
* Test if the CPU supports MMX/SSE* etc.
- * Use cpuid_has_ecxfeature() for *_ECX* features and
- * cpuid_has_edxfeature() for *_EDX* features.
+ * This is split into two parts:
+ * cpuid_has_ecxfeature and
+ * cpuid_has_edxfeature.
+ * See the enum for more information.
*
* Returns true if the feature is available, false otherwise.
*/
bool cpuid_has_ecxfeature(int feature);
bool cpuid_has_edxfeature(int feature);
+/**
+ * cpuid_has_extfeature - Test if @extfeature is supported
+ * @extfeature: the extended feature to test.
+ *
+ * This is split into two parts:
+ * cpuid_has_ecxfeature_ext and
+ * cpuid_has_edxfeature_ext.
+ * See the enum for more information.
+ *
+ * Test if the CPU supports this extfeature.
+ * Returns true on success, false otherwise.
+ */
+bool cpuid_has_ecxfeature_ext(int extfeature);
+bool cpuid_has_edxfeature_ext(int extfeature);
+
#else
#include <ccan/build_assert/build_assert.h>
-#define cpuid_get_cpu_type() BUILD_ASSERT_OR_ZERO(0)
-#define cpuid_get_cpu_type_string() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_get_cpu_type() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_is_intel() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_is_amd() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_get_name() BUILD_ASSERT_OR_ZERO(0)
-#define cpuid_is_supported() BUILD_ASSERT_OR_ZERO(0)
-#define cpuid(info, buf) BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_is_supported() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid(request, buf) BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_write_info(info, featureset, outfile) BUILD_ASSERT_OR_ZERO(0)
-#define cpuid_highest_ext_func_supported() BUILD_ASSERT_OR_ZERO(0)
-#define cpuid_test_feature(feature) BUILD_ASSERT_OR_ZERO(0)
-#define cpuid_has_feature(feature, ext) BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_highest_ext_func_supported() BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_test_feature(feature) BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_has_ecxfeature(feature) BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_has_edxfeature(feature) BUILD_ASSERT_OR_ZERO(0)
#endif
#endif