1 ; Definitions for the PowerPC architecture
4 ; Michael Neuling <mikey@neuling.org>
5 ; Jeremy Kerr <jk@ozlabs.org>
8 ; PowerPC® Microprocessor Family:
9 ; The Programming Environments Manual for 32 and 64-bit Microprocessors
11 ; http://www.power.org/resources/downloads/PowerISA_203.Public.pdf
14 ; Section 3.2.1 Machine State Register (MSR)
16 name: PowerPC Machine State Register
17 field: 0 64-bit mode (SF)
20 field: 3 Hypervisor State (HV)
21 field: 38 Vector Available (VEC)
22 field: 48 External Interrupt Enable (EE)
23 field: 49 Problem State (PR)
24 value: 0 privileged state
25 value: 1 problem state
26 field: 50 Floating-Point Available (FP)
27 field: 51 Machine Check Interrupt Enable (ME)
28 field: 52,55 Floating-Point Exception Mode (FE)
29 value: 0 ignore exceptions
30 value: 1 imprecise nonrecoverable
31 value: 2 imprecise recoverable
33 field: 53 Single-Step Trace Enable (SE)
34 field: 54 Branch Trace Enable (BE)
35 field: 58 Instruction Relocate (IR)
36 field: 59 Data Relocate (DR)
37 field: 61 Performance Monitor Mark (PMM)
38 field: 62 Recoverable Interrupt (RI)
39 field: 63 Little-Endian Mode (LE)
41 value: 1 little-endian
43 ; Section 8, Instruction slbmte
45 name: PowerPC SLB ESID Entry
46 field: 0:35 Effective segment ID (ESID)
50 ; Section 8, Instruction slbmte
52 name: PowerPC SLB VSID Entry
53 field: 0:1 Segment size selector (B)
58 field: 2:51 Virtual segment ID (VSID)
59 field: 52 Supervisor state storage key (Ks)
60 field: 53 Problem state storage key (Kp)
61 field: 55,58,59 Virtual page size selector
62 value: 0 4KB (Unless PTE specifies 64KB) (MPS)
63 value: 5 64KB (Provided PTE specifies 64KB) (MPS)
64 field: 54 No-execute segment (N)
67 value: 1 little-endian
70 ; The PowerPC Architecture:
71 ; A Specification For A New Family Of RISC Processors
72 ; Book III PowerPC Operating Environment Architecture
74 ; Section 2.2.3 Machine State Register (MSR)
76 name: PowerPC Machine State Register
78 field: 13 Power Management Enable (POW)
79 field: 15 Little-Endian Exception Mode (ILE)
80 field: 16 External Interrupt Enable (EE)
81 field: 17 Problem State (PR)
82 value: 0 privileged state
83 value: 1 problem state
84 field: 18 Floating-Point Available (FP)
85 field: 19 Machine Check Interrupt Enable (ME)
86 field: 20,23 Floating-Point Exception Mode (FE)
87 value: 0 ignore exceptions
88 value: 1 imprecise nonrecoverable
89 value: 2 imprecise recoverable
91 field: 21 Single-Step Trace Enable (SE)
92 field: 22 Branch Trace Enable (BE)
93 field: 26 Instruction Relocate (IR)
94 field: 27 Data Relocate (DR)
95 field: 30 Recoverable Interrupt (RI)
96 field: 31 Little-Endian Mode (LE)
98 value: 1 little-endian
100 ; POWER ISA(tm) Book III-S
101 ; Section 5.7.6.1 Page Table
104 name: Page Table Entry, Dword 0
105 field: 0:1 Segment Size (B)
110 field: 2:56 Abbreviated Virtual Page Number (AVPN)
111 field: 57:60 Software bits (SW)
112 field: 61 Virtual page size (L)
115 field: 62 Hash function identifier (H)
119 name: Page Table Entry, Dword 1
120 field: 2:43 Appreviated Real Page Number (ARPN)
121 field: 44:51 Large page size selector (LP)
122 field: 54 Address Compare bit (AC)
123 field: 55 Reference bit (R)
124 field: 56 Change bit (C)
125 field: 57 Storage control bit (W)
126 field: 58 Storage control bit (I)
127 field: 59 Storage control bit (M)
128 field: 60 Storage control bit (G)
129 field: 61 No-execute page (N)
130 field: 62:63 Page protection bits (PP)
131 value: 0 Key=0 read/write K=1 no access
132 value: 1 Key=0 read/write K=1 read only
133 value: 2 Key=0 read/write K=1 read/write
134 value: 3 Key=0 read only K=1 read only
137 name: PowerPC Storage Description register
138 field: 2:45 Real address of Page Table (HTABORG)
139 field: 59:63 Encoded size of Page Table (HTABSIZE)