X-Git-Url: http://git.ozlabs.org/?p=ccan;a=blobdiff_plain;f=ccan%2Fcpuid%2Fcpuid.c;h=5b00e82da9ae177ddeb58b3ba6af816389140680;hp=153f52d4a4ad513b7898095f880d2777d44d9b5e;hb=92b6e205441e5ead73b1dba53e8431aa1002086c;hpb=13b38a7282c6043d6abe310e5a16d6610ed7a1c1 diff --git a/ccan/cpuid/cpuid.c b/ccan/cpuid/cpuid.c index 153f52d4..5b00e82d 100644 --- a/ccan/cpuid/cpuid.c +++ b/ccan/cpuid/cpuid.c @@ -61,37 +61,10 @@ static void ___cpuid(cpuid_t info, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, } #endif -static struct { - uint32_t feature; - uint32_t mask; - bool use_edx; /* ecx will be used if false. */ -} features[] = { - { CF_MMX, 1 << 23, true }, - { CF_SSE, 1 << 25, true }, - { CF_SSE2, 1 << 26, true }, - { CF_SSE3, 1 << 9, false }, - { CF_FPU, 1 << 0, true }, - - { CF_TSC, 1 << 4, true }, - { CF_MSR, 1 << 5, true }, - - { CF_SSSE3, 1 << 9, false }, - { CF_AVX, 1 << 28, false }, - - /* Extended ones. */ - { CEF_x64, 1 << 30, true }, - { CEF_FPU, 1 << 0, true }, - { CEF_DE, 1 << 2, true }, - { CEF_SYSCALLRET, 1 << 11, true }, - { CEF_CMOV, 1 << 15, true }, - - { CEF_SSE4a, 1 << 6, false }, - { CEF_FMA4, 1 << 16, false }, - { CEF_XOP, 1 << 11, false } -}; - bool cpuid_is_supported(void) { + int ret = 0; +#if defined(__GNUC__) || defined(__clang__) /* The following assembly code uses EAX as the return value, * but we store the value of EAX into ret since GCC uses EAX * as the return register for every C function. That's a double @@ -115,16 +88,15 @@ bool cpuid_is_supported(void) #define ASM_POPF "popfq\n\t" #define ASM_PUSHEAX "pushq %%rax\n\t" #define ASM_POPEAX "popq %%rax\n\t" -#define ASM_PUSHECX "popq %%rcx\n\t" +#define ASM_PUSHECX "pushq %%rcx\n\t" #elif UINTPTR_MAX == 0xffffffff #define ASM_PUSHF "pushfl\n\t" #define ASM_POPF "popfl\n\t" #define ASM_PUSHEAX "pushl %%eax\n\t" #define ASM_POPEAX "popl %%eax\n\t" -#define ASM_PUSHECX "popl %%ecx\n\t" +#define ASM_PUSHECX "pushl %%ecx\n\t" #endif - int ret = 0; asm volatile( ASM_PUSHF ASM_POPEAX @@ -147,7 +119,26 @@ bool cpuid_is_supported(void) #undef ASM_PUSHEAX #undef ASM_POPEAX #undef ASM_PUSHECX - +#elif defined _MSC_VER + __asm { + pushfd + pop eax + mov ecx, eax + xor eax, 0x200000 + push eax + popfd + + pushfd + pop eax + xor eax, ecx + shr eax, 21 + and eax, 1 + push ecx + popfd + + mov eax, ret + }; +#endif return !!ret; } @@ -159,24 +150,48 @@ bool cpuid_test_feature(cpuid_t feature) return (feature <= cpuid_highest_ext_func_supported()); } -bool cpuid_has_feature(int feature, bool extended) +bool cpuid_has_ecxfeature(int feature) { - uint32_t eax, ebx, ecx, edx, i; - - if (!extended) - ___cpuid(CPU_PROCINFO_AND_FEATUREBITS, &eax, &ebx, &ecx, &edx); - else - ___cpuid(CPU_EXTENDED_PROC_INFO_FEATURE_BITS, &eax, &ebx, &ecx, &edx); - - for (i = 0; i < sizeof(features) / sizeof(features[0]); ++i) { - if (features[i].feature == feature) { - if (features[i].use_edx) - return (edx & features[i].mask); - else - return (ecx & features[i].mask); - } + static uint32_t _ecx; + if (_ecx == 0) { +#if defined(__GNUC__) || defined(__clang__) + asm volatile( + "cpuid\n\t" + : "=c" (_ecx) + : "a" (CPU_PROCINFO_AND_FEATUREBITS) + ); +#elif defined _MSC_VER + __asm { + mov eax, CPU_PROCINFO_AND_FEATUREBITS + cpuid + mov _ecx, ecx + }; +#endif + } + + return (_ecx & feature) == feature; +} + +bool cpuid_has_edxfeature(int feature) +{ + static uint32_t _edx; + if (_edx == 0) { +#if defined(__GNUC__) || defined(__clang__) + asm volatile( + "cpuid\n\t" + : "=d" (_edx) + : "a" (CPU_PROCINFO_AND_FEATUREBITS) + ); +#elif defined _MSC_VER + __asm { + mov eax, CPU_PROCINFO_AND_FEATUREBITS + cpuid + mov _edx, edx + }; +#endif } - return false; + + return (_edx & feature) == feature; } static const char *const cpuids[] = { @@ -220,9 +235,14 @@ cputype_t cpuid_get_cpu_type(void) return cputype; } -const char *cpuid_get_cpu_type_string(const cputype_t cputype) +bool cpuid_sprintf_cputype(const cputype_t cputype, char *buf) { - return cpuids[(int)cputype]; + if (cputype == CT_NONE) + return false; + + memcpy(buf, cpuids[(int)cputype], 12); + buf[12] = '\0'; + return true; } uint32_t cpuid_highest_ext_func_supported(void) @@ -230,11 +250,19 @@ uint32_t cpuid_highest_ext_func_supported(void) static uint32_t highest; if (!highest) { +#if defined(__GNUC__) || defined(__clang__) asm volatile( "cpuid\n\t" : "=a" (highest) : "a" (CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED) ); +#elif defined _MSC_VER + __asm { + mov eax, CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED + cpuid + mov highest, eax + }; +#endif } return highest; @@ -276,10 +304,20 @@ void cpuid(cpuid_t info, uint32_t *buf) buf[2] = ecx; break; case CPU_PROCINFO_AND_FEATUREBITS: - buf[0] = eax; /* The so called "signature" of the CPU. */ - buf[1] = edx; /* Feature flags #1. */ - buf[2] = ecx; /* Feature flags #2. */ - buf[3] = ebx; /* Additional feature information. */ + buf[0] = (eax & 0x0F); /* Stepping */ + buf[1] = (eax >> 4) & 0x0F; /* Model */ + buf[2] = (eax >> 8) & 0x0F; /* Family */ + buf[3] = (eax >> 16) & 0x0F; /* Extended Model. */ + buf[4] = (eax >> 24) & 0x0F; /* Extended Family. */ + + buf[5] = edx; /* Feature flags #1. */ + buf[6] = ecx; /* Feature flags #2. */ + + /* Additional Feature information. */ + buf[7] = ebx & 0xFF; + buf[8] = (ebx >> 8) & 0xFF; + buf[9] = (ebx >> 16) & 0xFF; + buf[10] = (ebx >> 24) & 0xFF; break; case CPU_CACHE_AND_TLBD_INFO: buf[0] = eax; @@ -298,13 +336,16 @@ void cpuid(cpuid_t info, uint32_t *buf) buf[3] = edx; break; case CPU_EXTENDED_L2_CACHE_FEATURES: - *buf = ecx; + buf[0] = ecx & 0xFF; /* Line size. */ + buf[1] = (ecx >> 12) & 0xFF; /* Associativity. */ + buf[2] = ecx >> 16; /* Cache size. */ break; case CPU_ADV_POWER_MGT_INFO: *buf = edx; break; case CPU_VIRT_PHYS_ADDR_SIZES: - *buf = eax; + buf[0] = eax & 0xFF; /* physical. */ + buf[1] = (eax >> 8) & 0xFF; /* virtual. */ break; default: *buf = 0xbaadf00d;