X-Git-Url: http://git.ozlabs.org/?p=ccan;a=blobdiff_plain;f=ccan%2Fcpuid%2Fcpuid.c;h=1a09c5e666cb9457041bb0ae524fdd579677c07d;hp=8b2024cbf6243ca280b0a15d9f6553a18457407f;hb=7061cc6bfc5a8270061b70cc55cf010e6c8e68b1;hpb=2df53ae1a1705474cd776d24b03f12818f77b232

diff --git a/ccan/cpuid/cpuid.c b/ccan/cpuid/cpuid.c
index 8b2024cb..1a09c5e6 100644
--- a/ccan/cpuid/cpuid.c
+++ b/ccan/cpuid/cpuid.c
@@ -90,45 +90,60 @@ static struct {
 	{ CEF_XOP, 		1 << 11, 	false }
 };
 
-static bool has_feature(int feature, uint32_t ecx, uint32_t edx)
-{
-	int i;
-
-	for (i = 0; i < sizeof(features) / sizeof(features[0]); ++i) {
-		if (features[i].feature == feature) {
-			if (features[i].use_edx)
-				return (edx & features[i].mask);
-			else
-				return (ecx & features[i].mask);
-		}
-	}
-
-	return false;
-}
-
 bool cpuid_is_supported(void)
 {
-	int ret = 0;
+	/* The following assembly code uses EAX as the return value,
+	 * but we store the value of EAX into ret since GCC uses EAX
+	 * as the return register for every C function.  That's a double
+	 * operation, but there's no other way to do this unless doing this
+	 * function entirely in assembly.  */
+
+	/* This check is to make sure that the compiler is actually compiling
+	 * for 64-bit.
+	 *
+	 * The compiler can be 32-bit and the system 64-bit so the 
+	 * following would be true:
+	 * 	#if defined(__x86_64) ...
+	 */
+
+#if UINTPTR_MAX == 0xffffffffffffffff
+#define ASM_PUSHF 	"pushfq\n\t"
+#define ASM_POPF	"popfq\n\t"
+#define ASM_PUSHEAX 	"pushq %%rax\n\t"
+#define ASM_POPEAX 	"popq %%rax\n\t"
+#define ASM_PUSHECX 	"popq %%rcx\n\t"
+#elif UINTPTR_MAX == 0xffffffff
+#define ASM_PUSHF 	"pushfl\n\t"
+#define ASM_POPF	"popfl\n\t"
+#define ASM_PUSHEAX 	"pushl %%eax\n\t"
+#define ASM_POPEAX 	"popl %%eax\n\t"
+#define ASM_PUSHECX 	"popl %%ecx\n\t"
+#endif
 
+	int ret = 0;
 	asm volatile(
-		"pushfl\n\t"
-		"popl %%eax\n\t"
+		ASM_PUSHF
+		ASM_POPEAX
 		"movl %%eax, %%ecx\n\t"
 		"xorl $0x200000, %%eax\n\t"
-		"pushl %%eax\n\t"
-		"popfl\n\t"
-
-		"pushfl\n\t"
-		"popl %%eax\n\t"
+		ASM_PUSHEAX
+		ASM_POPF
+		ASM_PUSHF
+		ASM_POPEAX
 		"xorl %%ecx, %%eax\n\t"
 		"shrl $21, %%eax\n\t"
 		"andl $1, %%eax\n\t"
-		"pushl %%ecx\n\t"
-		"popfl\n\t"
-
+		ASM_PUSHECX
+		ASM_POPF
 		: "=a" (ret)
 	);
 
+#undef ASM_PUSHF
+#undef ASM_POPF
+#undef ASM_PUSHEAX
+#undef ASM_POPEAX
+#undef ASM_PUSHECX
+
 	return !!ret;
 }
 
@@ -149,7 +164,15 @@ bool cpuid_has_feature(int feature, bool extended)
 	else
 		___cpuid(CPU_EXTENDED_PROC_INFO_FEATURE_BITS, &eax, &ebx, &ecx, &edx);
 
-	return has_feature(feature, ecx, edx);
+	for (i = 0; i < sizeof(features) / sizeof(features[0]); ++i) {
+		if (features[i].feature == feature) {
+			if (features[i].use_edx)
+				return (edx & features[i].mask);
+			else
+				return (ecx & features[i].mask);
+		}
+	}
+	return false;
 }
 
 static const char *const cpuids[] = {
@@ -225,9 +248,16 @@ void cpuid(cpuid_t info, uint32_t *buf)
 		return;
 
 	if (info == CPU_PROC_BRAND_STRING) {
-		___cpuid(CPU_PROC_BRAND_STRING,  	  &buf[0], &buf[1], &buf[2],  &buf[3]);
-		___cpuid(CPU_PROC_BRAND_STRING_INTERNAL0, &buf[4], &buf[5], &buf[6],  &buf[7]);
-		___cpuid(CPU_PROC_BRAND_STRING_INTERNAL1, &buf[8], &buf[9], &buf[10], &buf[11]);
+		static char cached[48] = { 0 };
+		if (cached[0] == '\0') {
+			___cpuid(CPU_PROC_BRAND_STRING,		  &buf[0], &buf[1], &buf[2],  &buf[3]);
+			___cpuid(CPU_PROC_BRAND_STRING_INTERNAL0, &buf[4], &buf[5], &buf[6],  &buf[7]);
+			___cpuid(CPU_PROC_BRAND_STRING_INTERNAL1, &buf[8], &buf[9], &buf[10], &buf[11]);
+
+			memcpy(cached, buf, sizeof cached);
+		} else
+			buf = (uint32_t *)cached;
+
 		return;
 	} else if (info == CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED) {
 		*buf = cpuid_highest_ext_func_supported();
@@ -260,6 +290,10 @@ void cpuid(cpuid_t info, uint32_t *buf)
 			buf[1] = ecx;
 			break;
 		case CPU_L1_CACHE_AND_TLB_IDS:
+			buf[0] = eax;
+			buf[1] = ebx;
+			buf[2] = ecx;
+			buf[3] = edx;
 			break;
 		case CPU_EXTENDED_L2_CACHE_FEATURES:
 			*buf = ecx;