]> git.ozlabs.org Git - ccan/blobdiff - ccan/cpuid/cpuid.h
cpuid: prefix cpuid_t enums with CPUID_* instead of CPU_*
[ccan] / ccan / cpuid / cpuid.h
index d119e4f51e9ea5dd3dee534b1420ed890baf0059..62adb4838a40bc5f71f64840a94a0362259a4cc3 100644 (file)
 #ifndef CCAN_CPUID_H
 #define CCAN_CPUID_H
 
+#include <stdbool.h>
+#include <stdint.h>
+
+/**
+ * enum cpuid - stuff to get information about from the CPU.
+ *
+ * This is used as a parameter in cpuid().
+ *
+ * CPUID_VENDORID:
+ *     The CPU's Vendor ID.
+ *
+ * CPUID_PROCINFO_AND_FEATUREBITS:
+ *     Processor information and feature bits (SSE, etc.).
+ *
+ * CPUID_CACHE_AND_TLBD_INFO
+ *     Cache and TLBD Information.
+ *
+ * CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
+ *     Highest extended function supported address.
+ *     Can be like 0x80000008.
+ *
+ * CPUID_EXTENDED_PROC_INFO_FEATURE_BITS:
+ *     Extended processor information and feature bits (64bit etc.)
+ *
+ * CPUID_PROC_BRAND_STRING:
+ *     The Processor's brand string.
+ *
+ * CPUID_L1_CACHE_AND_TLB_IDS:
+ *     L1 Cache and TLB Identifications.
+ *
+ * CPUID_EXTENDED_L2_CACHE_FEATURES:
+ *     Extended L2 Cache features.
+ *
+ * CPUID_ADV_POWER_MGT_INFO:
+ *     Advaned power management information.
+ *
+ * CPUID_VIRT_PHYS_ADDR_SIZES:
+ *     Virtual and physical address sizes.
+ */
+
 typedef enum cpuid {
-       CPU_VENDORID                                    = 0,
-       CPU_PROCINFO_AND_FEATUREBITS                    = 1,
-       CPU_CACHE_AND_TLBD_INFO                         = 2,
-
-       CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED         = 0x80000000,
-       CPU_EXTENDED_PROC_INFO_FEATURE_BITS             = 0x80000001,
-       CPU_PROC_BRAND_STRING                           = 0x80000002, 
-       CPU_L1_CACHE_AND_TLB_IDS                        = 0x80000005,
-       CPU_EXTENDED_L2_CACHE_FEATURES                  = 0x80000006,
-       CPU_ADV_POWER_MGT_INFO                          = 0x80000007,
-       CPU_VIRT_PHYS_ADDR_SIZES                        = 0x80000008
+       CPUID_VENDORID                                  = 0,
+       CPUID_PROCINFO_AND_FEATUREBITS                  = 1,
+       CPUID_CACHE_AND_TLBD_INFO                       = 2,
+
+       CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED       = 0x80000000,
+       CPUID_EXTENDED_PROC_INFO_FEATURE_BITS           = 0x80000001,
+       CPUID_PROC_BRAND_STRING                                 = 0x80000002,
+       CPUID_L1_CACHE_AND_TLB_IDS                      = 0x80000005,
+       CPUID_EXTENDED_L2_CACHE_FEATURES                        = 0x80000006,
+       CPUID_ADV_POWER_MGT_INFO                                = 0x80000007,
+       CPUID_VIRT_PHYS_ADDR_SIZES                      = 0x80000008
 } cpuid_t;
 
-typedef enum cpufeature {
-       CF_MMX          = 1 << 23,
-       CF_SSE          = 1 << 25,
-       CF_SSE2         = 1 << 26,
-       CF_SSE3         = 1 << 0,
+enum {
+       CPUID_FEAT_ECX_SSE3         = 1 << 0, 
+       CPUID_FEAT_ECX_PCLMUL       = 1 << 1,
+       CPUID_FEAT_ECX_DTES64       = 1 << 2,
+       CPUID_FEAT_ECX_MONITOR      = 1 << 3,  
+       CPUID_FEAT_ECX_DS_CPL       = 1 << 4,  
+       CPUID_FEAT_ECX_VMX          = 1 << 5,  
+       CPUID_FEAT_ECX_SMX          = 1 << 6,  
+       CPUID_FEAT_ECX_EST          = 1 << 7,  
+       CPUID_FEAT_ECX_TM2          = 1 << 8,  
+       CPUID_FEAT_ECX_SSSE3        = 1 << 9,  
+       CPUID_FEAT_ECX_CID          = 1 << 10,
+       CPUID_FEAT_ECX_FMA          = 1 << 12,
+       CPUID_FEAT_ECX_CX16         = 1 << 13, 
+       CPUID_FEAT_ECX_ETPRD        = 1 << 14, 
+       CPUID_FEAT_ECX_PDCM         = 1 << 15, 
+       CPUID_FEAT_ECX_DCA          = 1 << 18, 
+       CPUID_FEAT_ECX_SSE4_1       = 1 << 19, 
+       CPUID_FEAT_ECX_SSE4_2       = 1 << 20, 
+       CPUID_FEAT_ECX_x2APIC       = 1 << 21, 
+       CPUID_FEAT_ECX_MOVBE        = 1 << 22, 
+       CPUID_FEAT_ECX_POPCNT       = 1 << 23, 
+       CPUID_FEAT_ECX_AES          = 1 << 25, 
+       CPUID_FEAT_ECX_XSAVE        = 1 << 26, 
+       CPUID_FEAT_ECX_OSXSAVE      = 1 << 27, 
+       CPUID_FEAT_ECX_AVX          = 1 << 28,
+
+       CPUID_FEAT_EDX_FPU          = 1 << 0,  
+       CPUID_FEAT_EDX_VME          = 1 << 1,  
+       CPUID_FEAT_EDX_DE           = 1 << 2,  
+       CPUID_FEAT_EDX_PSE          = 1 << 3,  
+       CPUID_FEAT_EDX_TSC          = 1 << 4,  
+       CPUID_FEAT_EDX_MSR          = 1 << 5,  
+       CPUID_FEAT_EDX_PAE          = 1 << 6,  
+       CPUID_FEAT_EDX_MCE          = 1 << 7,  
+       CPUID_FEAT_EDX_CX8          = 1 << 8,  
+       CPUID_FEAT_EDX_APIC         = 1 << 9,  
+       CPUID_FEAT_EDX_SEP          = 1 << 11, 
+       CPUID_FEAT_EDX_MTRR         = 1 << 12, 
+       CPUID_FEAT_EDX_PGE          = 1 << 13, 
+       CPUID_FEAT_EDX_MCA          = 1 << 14, 
+       CPUID_FEAT_EDX_CMOV         = 1 << 15, 
+       CPUID_FEAT_EDX_PAT          = 1 << 16, 
+       CPUID_FEAT_EDX_PSE36        = 1 << 17, 
+       CPUID_FEAT_EDX_PSN          = 1 << 18, 
+       CPUID_FEAT_EDX_CLF          = 1 << 19, 
+       CPUID_FEAT_EDX_DTES         = 1 << 21, 
+       CPUID_FEAT_EDX_ACPI         = 1 << 22, 
+       CPUID_FEAT_EDX_MMX          = 1 << 23, 
+       CPUID_FEAT_EDX_FXSR         = 1 << 24, 
+       CPUID_FEAT_EDX_SSE          = 1 << 25, 
+       CPUID_FEAT_EDX_SSE2         = 1 << 26, 
+       CPUID_FEAT_EDX_SS           = 1 << 27, 
+       CPUID_FEAT_EDX_HTT          = 1 << 28, 
+       CPUID_FEAT_EDX_TM1          = 1 << 29, 
+       CPUID_FEAT_EDX_IA64         = 1 << 30,
+       CPUID_FEAT_EDX_PBE          = 1 << 31
+};
 
-       CF_SSSE3        = 1 << 9,
-       CF_SSE41        = 1 << 19,
-       CF_SSE42        = 1 << 20,
+typedef enum cputype {
+       CT_NONE,
+       CT_AMDK5,
+       CT_AMD,
+       CT_CENTAUR,
+       CT_CYRIX,
+       CT_INTEL,
+       CT_TRANSMETA,
+       CT_NATIONAL_SEMICONDUCTOR,
+       CT_NEXGEN,
+       CT_RISE,
+       CT_SIS,
+       CT_UMC,
+       CT_VIA,
+       CT_VORTEX,
+       CT_KVM
+} cputype_t;
 
-       CF_AVX          = 1 << 28,
-       CF_FMA          = 1 << 12
-} cpufeature_t;
+#if defined(__i386__) || defined(__i386) || defined(__x86_64) \
+       || defined(_M_AMD64) || defined(__M_X64)
 
-typedef enum cpuextfeature {
-       CEF_x64         = 1 << 29,
-       CEF_SSE4a       = 1 << 6,
-       CEF_FMA4        = 1 << 16,
-       CEF_XOP         = 1 << 11
-} cpuextfeature_t;
+/**
+ * cpuid_get_cpu_type - Get CPU Type
+ *
+ * Returns the CPU Type as cputype_t.
+ *
+ * See also: cpuid_get_cpu_type_string()
+ */
+#define is_intel_cpu()         cpuid_get_cpu_type() == CT_INTEL
+#define is_amd_cpu()   cpuid_get_cpu_type() == CT_AMDK5 || cpuid_get_cpu_type() == CT_AMD
+cputype_t cpuid_get_cpu_type(void);
 
-/* returns 1 if the cpuid instruction is supported, 0 otherwise.
+/**
+ * cpuid_sprintf_cputype - Get CPU Type string
+ * @cputype: a char of atleast 12 bytes in it.
  *
- * CPUID isn't supported on very old Intel CPUs.
- * Defined in issupprted.S
+ * Returns true on success, false on failure
  */
-int cpuid_is_supported(void);
+bool cpuid_sprintf_cputype(const cputype_t cputype, char *buf);
 
-/* returns the highest extended function supported.
+/**
+ * cpuid_is_supported - test if the CPUID instruction is supported
+ *
+ * CPUID is not supported by old CPUS.
+ *
+ * Returns true if the cpuid instruction is supported, false otherwise.
+ *
+ * See also: cpuid()
+ */
+bool cpuid_is_supported(void);
+
+/**
+ * cpuid_highest_ext_func_supported - Get the highest extended function supported
+ *
+ *
+ * Returns the highest extended function supported.
  *
  * This is the same as calling:
- *     cpuid(CPU_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest);
+ *     cpuid(CPUID_HIGHEST_EEXTENDED_FUNCTION_SUPPORTED, &highest);
  *
  * This is made visible to the linker because it's easier to call it
  * instead of calling cpuid with less type-checking.  cpuid calls this.
+ *
+ * See also: cpuid()
  */
-int highest_ext_func_supported(void);
+uint32_t cpuid_highest_ext_func_supported(void);
 
-/* Get Some information from the CPU.
+/**
+ * cpuid - Get Some information from the CPU.
+ *
  * This function expects buf to be a valid pointer to a string/int/...
  * depending on the requested information.
  *
- * For CPU_VENDOR_ID:
+ * For CPUID_VENDOR_ID:
  *     Returns a string into buf.
  *
- * For CPU_PROCINFO_AND_FEATUREBITS:
- *     buf[0]:
- *             - 3:0 - Stepping
- *             - 7:4 - Model
- *             - 11:8 - Family
- *             - 13:12 - Processor Type
- *             - 19:16 - Extended Model
- *             - 27:20 - Extended family
- *     buf[1] and buf[2]:
+ * For CPUID_PROCINFO_AND_FEATUREBITS:
+ *     buf[0]: Stepping
+ *     buf[1]: Model
+ *     buf[2]: Family
+ *     buf[3]: Extended Model
+ *     buf[4]: Extended Family
+ *     buf[5] and buf[6]:
  *             Feature flags
- *     buf[3]:
- *             Additional feature information.
+ *     buf[7]: Brand Index
+ *     buf[8]: CL Flush Line Size
+ *     buf[9]: Logical Processors
+ *     buf[10]: Initial APICID
+ *
+ * For CPUID_L1_CACHE_AND_TLB_IDS:
+ *     buf[0]: (eax):
+ *             - 7..0  Number of times to exec cpuid to get all descriptors.
+ *             - 15..8 Instruction TLB: 4K Pages, 4-way set associtive, 128 entries.
+ *             - 23..16 Data TLB: 4k Pages, 4-way set associtive, 128 entries.
+ *             - 24..31 Instruction TLB: 4K Pages, 4-way set associtive, 2 entries.
+ *     buf[1]: (ebx):
+ *             - 7..0 64-byte prefetching
+ *             - 8..31 Null descriptor
+ *     buf[2]: (ecx):
+ *             - 0..31 Null descriptor
+ *     buf[3]: (edx):
+ *             - 7..0 2nd-level cache, 2M, 8-way set associtive, 64-byte line size
+ *             - 15..8 1st-level instruction cache: 32K, 8-way set associtive, 64 byte line size
+ *             - 16..23 Data TLB: 4M Pages, 4-way set associtive, 8 entires.
+ *             - 24..31 1st-level data cache: 32K, 8-way set associtive, 64 byte line size
  *
- * For CPU_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
+ * For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED:
  *     Returns the highest supported function in *buf (expects an integer ofc)
  *
- * For CPU_EXTENDED_PROC_INFO_FEATURE_BITS:
+ * For CPUID_EXTENDED_PROC_INFO_FEATURE_BITS:
  *     Returns them in buf[0] and buf[1].
  *
- * For CPU_VIRT_PHYS_ADDR_SIZES:
- *     Returns it as an integer in *buf.
+ * For CPUID_EXTENDED_L2_CACHE_FEATURES:
+ *     buf[0]: Line size
+ *     buf[1]: Associativity
+ *     buf[2]: Cache size.
  *
- * For CPU_PROC_BRAND_STRING:
+ * For CPUID_VIRT_PHYS_ADDR_SIZES:
+ *     buf[0]: Physical
+ *     buf[1]: Virtual
+ *
+ * For CPUID_PROC_BRAND_STRING:
  *     Have a char array with at least 48 bytes assigned to it.
  *
+ * Here's a page which will help you parse the data provided by this function.
+ *     http://www.flounder.com/cpuid_explorer2.htm
+ *
  * If an invalid flag has been passed a 0xbaadf00d is returned in *buf.
  */
-void cpuid(cpuid_t info, void *buf);
+void cpuid(cpuid_t info, uint32_t *buf);
 
-/*
- * Returns 1 if feature is supported, 0 otherwise.
+/**
+ * cpuid_test_feature - Test if @feature is available
+ *
+ * Returns true if feature is supported, false otherwise.
  *
- * The feature parameter must be >= CPU_EXTENDED_PROC_INFO_FEATURE_BITS
- *  and <= CPU_VIRT_PHYS_ADDR_SIZES.
+ * The feature parameter must be >= CPUID_EXTENDED_PROC_INFO_FEATURE_BITS
+ *  and <= CPUID_VIRT_PHYS_ADDR_SIZES.
  */
-int cpuid_test_feature(cpuid_t feature);
+bool cpuid_test_feature(cpuid_t feature);
 
-/* Test if the CPU supports MMX/SSE*
+/**
+ * cpuid_has_feature - Test if @feature is supported
  *
- * Returns 1 if the feature is available, 0 otherwise.
- */
-#define cpuid_has_mmx()        cpuid_has_feature(CF_MMX)
-#define cpuid_has_sse()        cpuid_has_feature(CF_SSE)
-#define cpuid_has_sse2()       cpuid_has_feature(CF_SSE2)
-#define cpuid_has_sse3()       cpuid_has_feature(CF_SSE3)
-#define cpuid_has_ssse3()      cpuid_has_feature(CF_SSSE3)
-#define cpuid_has_sse41()      cpuid_has_feature(CF_SSE41)
-#define cpuid_has_sse42()      cpuid_has_feature(CF_SSE42)
-#define cpuid_has_avx()        cpuid_has_feature(CF_AVX)
-#define cpuid_has_fma()        cpuid_has_feature(CF_FMA)
-int cpuid_has_feature(cpufeature_t feature);
-
-/* Test if the CPU supports an extended feature.
- *
- * Returns 1 if available, 0 otherwise.
+ * Test if the CPU supports MMX/SSE* etc.
+ * Use cpuid_has_ecxfeature() for *_ECX* features and
+ * cpuid_has_edxfeature() for *_EDX* features.
+ *
+ * Returns true if the feature is available, false otherwise.
  */
-#define cpuid_has_x64()        cpuid_has_ext_feature(CEF_x64)
-#define cpuid_has_sse4a()      cpuid_has_ext_feature(CEF_SSE4a)
-#define cpuid_has_fma4()       cpuid_has_ext_feature(CEF_FMA4)
-#define cpuid_has_xop()        cpuid_has_ext_feature(CEF_XOP)
-int cpuid_has_ext_feature(cpuextfeature_t extfeature);
+bool cpuid_has_ecxfeature(int feature);
+bool cpuid_has_edxfeature(int feature);
 
-#endif
+#else
+#include <ccan/build_assert/build_assert.h>
 
+#define cpuid_get_cpu_type()                   BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_get_cpu_type_string()            BUILD_ASSERT_OR_ZERO(0)
+
+#define cpuid_is_supported()                   BUILD_ASSERT_OR_ZERO(0)
+#define cpuid(info, buf)                       BUILD_ASSERT_OR_ZERO(0)
+
+#define cpuid_highest_ext_func_supported()     BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_test_feature(feature)            BUILD_ASSERT_OR_ZERO(0)
+#define cpuid_has_feature(feature, ext)        BUILD_ASSERT_OR_ZERO(0)
+
+#endif
+#endif