X-Git-Url: http://git.ozlabs.org/?a=blobdiff_plain;f=ccan%2Fcpuid%2Fcpuid.h;h=89ef864945af9e1884bb547223033ad2b4866023;hb=ac7f55756015e12dc3e00f4c20995ea31670caef;hp=9bf4ff31d8cf516640706588b123d321fe3a7086;hpb=581bc150d4eb250cab3fc12738131a95e87722a8;p=ccan diff --git a/ccan/cpuid/cpuid.h b/ccan/cpuid/cpuid.h index 9bf4ff31..89ef8649 100644 --- a/ccan/cpuid/cpuid.h +++ b/ccan/cpuid/cpuid.h @@ -30,35 +30,37 @@ * * This is used as a parameter in cpuid(). * - * CPUID_VENDORID: + * %CPUID_VENDORID: * The CPU's Vendor ID. * - * CPUID_PROCINFO_AND_FEATUREBITS: + * %CPUID_PROCINFO_AND_FEATUREBITS: * Processor information and feature bits (SSE, etc.). * - * CPUID_CACHE_AND_TLBD_INFO + * %CPUID_CACHE_AND_TLBD_INFO * Cache and TLBD Information. + * For AMD: Use CPUID_EXTENDED_L2_CACHE_FEATURES * - * CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: + * %CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: * Highest extended function supported address. * Can be like 0x80000008. * - * CPUID_EXTENDED_PROC_INFO_FEATURE_BITS: + * %CPUID_EXTENDED_PROC_INFO_FEATURE_BITS: * Extended processor information and feature bits (64bit etc.) * - * CPUID_PROC_BRAND_STRING: + * %CPUID_PROC_BRAND_STRING: * The Processor's brand string. * - * CPUID_L1_CACHE_AND_TLB_IDS: + * %CPUID_L1_CACHE_AND_TLB_IDS: * L1 Cache and TLB Identifications. + * AMD Only. * - * CPUID_EXTENDED_L2_CACHE_FEATURES: + * %CPUID_EXTENDED_L2_CACHE_FEATURES: * Extended L2 Cache features. * - * CPUID_ADV_POWER_MGT_INFO: + * %CPUID_ADV_POWER_MGT_INFO: * Advaned power management information. * - * CPUID_VIRT_PHYS_ADDR_SIZES: + * %CPUID_VIRT_PHYS_ADDR_SIZES: * Virtual and physical address sizes. */ @@ -103,6 +105,16 @@ enum { CPUID_FEAT_ECX_OSXSAVE = 1 << 27, CPUID_FEAT_ECX_AVX = 1 << 28, + CPUID_FEAT_ECX_ALL = CPUID_FEAT_ECX_SSE3 | CPUID_FEAT_ECX_PCLMUL | CPUID_FEAT_ECX_DTES64 + | CPUID_FEAT_ECX_MONITOR | CPUID_FEAT_ECX_DS_CPL | CPUID_FEAT_ECX_VMX + | CPUID_FEAT_ECX_SMX | CPUID_FEAT_ECX_EST | CPUID_FEAT_ECX_TM2 + | CPUID_FEAT_ECX_SSSE3 | CPUID_FEAT_ECX_CID | CPUID_FEAT_ECX_FMA + | CPUID_FEAT_ECX_CX16 | CPUID_FEAT_ECX_ETPRD | CPUID_FEAT_ECX_PDCM + | CPUID_FEAT_ECX_DCA | CPUID_FEAT_ECX_SSE4_1 | CPUID_FEAT_ECX_SSE4_2 + | CPUID_FEAT_ECX_x2APIC | CPUID_FEAT_ECX_MOVBE | CPUID_FEAT_ECX_POPCNT + | CPUID_FEAT_ECX_AES | CPUID_FEAT_ECX_XSAVE | CPUID_FEAT_ECX_OSXSAVE + | CPUID_FEAT_ECX_AVX, + CPUID_FEAT_EDX_FPU = 1 << 0, CPUID_FEAT_EDX_VME = 1 << 1, CPUID_FEAT_EDX_DE = 1 << 2, @@ -132,7 +144,72 @@ enum { CPUID_FEAT_EDX_HTT = 1 << 28, CPUID_FEAT_EDX_TM1 = 1 << 29, CPUID_FEAT_EDX_IA64 = 1 << 30, - CPUID_FEAT_EDX_PBE = 1 << 31 + CPUID_FEAT_EDX_PBE = 1 << 31, + + CPUID_FEAT_EDX_ALL = CPUID_FEAT_EDX_FPU | CPUID_FEAT_EDX_VME | CPUID_FEAT_EDX_DE + | CPUID_FEAT_EDX_PSE | CPUID_FEAT_EDX_TSC | CPUID_FEAT_EDX_MSR + | CPUID_FEAT_EDX_PAE | CPUID_FEAT_EDX_MCE | CPUID_FEAT_EDX_CX8 + | CPUID_FEAT_EDX_APIC | CPUID_FEAT_EDX_SEP | CPUID_FEAT_EDX_MTRR + | CPUID_FEAT_EDX_PGE | CPUID_FEAT_EDX_MCA | CPUID_FEAT_EDX_CMOV + | CPUID_FEAT_EDX_PAT | CPUID_FEAT_EDX_PSE36 | CPUID_FEAT_EDX_PSN + | CPUID_FEAT_EDX_CLF | CPUID_FEAT_EDX_DTES | CPUID_FEAT_EDX_ACPI + | CPUID_FEAT_EDX_MMX | CPUID_FEAT_EDX_FXSR | CPUID_FEAT_EDX_SSE + | CPUID_FEAT_EDX_SSE2 | CPUID_FEAT_EDX_SS | CPUID_FEAT_EDX_HTT + | CPUID_FEAT_EDX_TM1 | CPUID_FEAT_EDX_IA64 | CPUID_FEAT_EDX_PBE +}; + +enum { + CPUID_EXTFEAT_ECX_LAHF_LM = 1 << 0, + CPUID_EXTFEAT_ECX_CMP_LEGACY = 1 << 1, + CPUID_EXTFEAT_ECX_SVM = 1 << 2, + CPUID_EXTFEAT_ECX_EXTAPIC = 1 << 3, + CPUID_EXTFEAT_ECX_CR8_LEGACY = 1 << 4, + CPUID_EXTFEAT_ECX_ABM = 1 << 5, + CPUID_EXTFEAT_ECX_SSE4A = 1 << 6, + CPUID_EXTFEAT_ECX_MISALIGNSSE = 1 << 7, + CPUID_EXTFEAT_ECX_3DNOWPREFETCH = 1 << 8, + CPUID_EXTFEAT_ECX_OSVW = 1 << 9, + CPUID_EXTFEAT_ECX_IBS = 1 << 10, + CPUID_EXTFEAT_ECX_XOP = 1 << 11, + CPUID_EXTFEAT_ECX_SKINIT = 1 << 12, + CPUID_EXTFEAT_ECX_WDT = 1 << 13, + CPUID_EXTFEAT_ECX_LWP = 1 << 15, + CPUID_EXTFEAT_ECX_FMA4 = 1 << 16, + CPUID_EXTFEAT_ECX_TCE = 1 << 17, + CPUID_EXTFEAT_ECX_NODEIDE_MSR = 1 << 19, + CPUID_EXTFEAT_ECX_TBM = 1 << 21, + CPUID_EXTFEAT_ECX_TOPOEXT = 1 << 22, + CPUID_EXTFEAT_ECX_PERFXTR_CORE = 1 << 23, + CPUID_EXTFEAT_ECX_PERFCTR_NB = 1 << 24, + + CPUID_EXTFEAT_EDX_FPU = 1 << 0, + CPUID_EXTFEAT_EDX_VME = 1 << 1, + CPUID_EXTFEAT_EDX_DE = 1 << 2, + CPUID_EXTFEAT_EDX_PSE = 1 << 3, + CPUID_EXTFEAT_EDX_TSC = 1 << 4, + CPUID_EXTFEAT_EDX_MSR = 1 << 5, + CPUID_EXTFEAT_EDX_PAE = 1 << 6, + CPUID_EXTFEAT_EDX_MCE = 1 << 7, + CPUID_EXTFEAT_EDX_CX8 = 1 << 8, + CPUID_EXTFEAT_EDX_APIC = 1 << 9, + CPUID_EXTFEAT_EDX_SYSCALL = 1 << 11, + CPUID_EXTFEAT_EDX_MTRR = 1 << 12, + CPUID_EXTFEAT_EDX_PGE = 1 << 13, + CPUID_EXTFEAT_EDX_MCA = 1 << 14, + CPUID_EXTFEAT_EDX_CMOV = 1 << 15, + CPUID_EXTFEAT_EDX_PAT = 1 << 16, + CPUID_EXTFEAT_EDX_PSE36 = 1 << 17, + CPUID_EXTFEAT_EDX_MP = 1 << 19, + CPUID_EXTFEAT_EDX_NX = 1 << 20, + CPUID_EXTFEAT_EDX_MMXEXT = 1 << 22, + CPUID_EXTFEAT_EDX_MMX = 1 << 23, + CPUID_EXTFEAT_EDX_FXSR = 1 << 24, + CPUID_EXTFEAT_EDX_FXSR_OPT = 1 << 25, + CPUID_EXTFEAT_EDX_PDPE1GB = 1 << 26, + CPUID_EXTFEAT_EDX_RDTSCP = 1 << 27, + CPUID_EXTFEAT_EDX_LM = 1 << 29, + CPUID_EXTFEAT_EDX_3DNOWEXT = 1 << 30, + CPUID_EXTFEAT_EDX_3DNOW = 1 << 31 }; typedef enum cputype { @@ -217,29 +294,32 @@ uint32_t cpuid_highest_ext_func_supported(void); * buf[2]: Family * buf[3]: Extended Model * buf[4]: Extended Family - * buf[5] and buf[6]: - * Feature flags - * buf[7]: Brand Index - * buf[8]: CL Flush Line Size - * buf[9]: Logical Processors - * buf[10]: Initial APICID + * buf[5]: Brand Index + * buf[6]: CL Flush Line Size + * buf[7]: Logical Processors + * buf[8]: Initial APICID * * For CPUID_L1_CACHE_AND_TLB_IDS: - * buf[0]: (eax): - * - 7..0 Number of times to exec cpuid to get all descriptors. - * - 15..8 Instruction TLB: 4K Pages, 4-way set associtive, 128 entries. - * - 23..16 Data TLB: 4k Pages, 4-way set associtive, 128 entries. - * - 24..31 Instruction TLB: 4K Pages, 4-way set associtive, 2 entries. - * buf[1]: (ebx): - * - 7..0 64-byte prefetching - * - 8..31 Null descriptor - * buf[2]: (ecx): - * - 0..31 Null descriptor - * buf[3]: (edx): - * - 7..0 2nd-level cache, 2M, 8-way set associtive, 64-byte line size - * - 15..8 1st-level instruction cache: 32K, 8-way set associtive, 64 byte line size - * - 16..23 Data TLB: 4M Pages, 4-way set associtive, 8 entires. - * - 24..31 1st-level data cache: 32K, 8-way set associtive, 64 byte line size + * buf[0] to buf[3]: 2M+4M page TLB info + * 0: Inst count + * 1: Inst Assoc + * 2: Data Count + * 3: Data Assoc + * buf[4] to buf[7]: 4k page TLB info + * 0: Inst count + * 1: Inst Assoc + * 2: Data Count + * 3: Data Assoc + * buf[8] to buf[11]: L1 data cache information + * 0: Line Size + * 1: LinesPerTag + * 2: Associativity + * 3: CacheSize + * buf[12] to buf[15]: L1 instruction cache info + * 0: Line Size + * 1: LinesPerTag + * 2: Associativity + * 3: CacheSize * * For CPUID_HIGHEST_EXTENDED_FUNCTION_SUPPORTED: * Returns the highest supported function in *buf (expects an integer ofc) @@ -263,6 +343,25 @@ uint32_t cpuid_highest_ext_func_supported(void); */ void cpuid(cpuid_t info, uint32_t *buf); +/** + * cpuid_write_info - Write specified CPU information to a file. + * @info: Bit set of information to write. + * @featureset: Bit set of features to write. + * @outfile: Output filename (Max 256). + * + * If @outfile is NULL, a name is choosen in the following format: + * CPUVENDOR_PROCESSORBRAND.cpuid + * + * Returns true on success, false otherwise. + * + * Example usage: + * if (!cpuid_write_info(CPUID_VENDORID | CPUID_PROC_BRAND_STRING, + * CPUID_FEAT_ECX_SSE3 | CPUID_FEAT_EDX_FPU, + * "cpuinfo.cpuid")) + * ... error ... + */ +bool cpuid_write_info(uint32_t info, uint32_t featureset, const char *outfile); + /** * cpuid_test_feature - Test if @feature is available * @@ -277,27 +376,46 @@ bool cpuid_test_feature(cpuid_t feature); * cpuid_has_feature - Test if @feature is supported * * Test if the CPU supports MMX/SSE* etc. - * Use cpuid_has_ecxfeature() for *_ECX* features and - * cpuid_has_edxfeature() for *_EDX* features. + * This is split into two parts: + * cpuid_has_ecxfeature and + * cpuid_has_edxfeature. + * See the enum for more information. + * * * Returns true if the feature is available, false otherwise. */ bool cpuid_has_ecxfeature(int feature); bool cpuid_has_edxfeature(int feature); +/** + * cpuid_has_extfeature - Test if @extfeature is supported + * @extfeature: the extended feature to test. + * + * This is split into two parts: + * cpuid_has_ecxfeature_ext and + * cpuid_has_edxfeature_ext. + * See the enum for more information. + * + * Test if the CPU supports this feature. + * Returns true on success, false otherwise. + */ +bool cpuid_has_ecxfeature_ext(int extfeature); +bool cpuid_has_edxfeature_ext(int extfeature); + #else #include -#define cpuid_get_cpu_type() BUILD_ASSERT_OR_ZERO(0) -#define cpuid_get_cpu_type_string() BUILD_ASSERT_OR_ZERO(0) +#define cpuid_get_cpu_type() BUILD_ASSERT_OR_ZERO(0) +#define cpuid_get_cpu_type_string() BUILD_ASSERT_OR_ZERO(0) -#define cpuid_is_supported() BUILD_ASSERT_OR_ZERO(0) -#define cpuid(info, buf) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_is_supported() BUILD_ASSERT_OR_ZERO(0) +#define cpuid(info, buf) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_write_info(info, featureset, outfile) BUILD_ASSERT_OR_ZERO(0) -#define cpuid_highest_ext_func_supported() BUILD_ASSERT_OR_ZERO(0) -#define cpuid_test_feature(feature) BUILD_ASSERT_OR_ZERO(0) -#define cpuid_has_ecxfeature(feature) BUILD_ASSERT_OR_ZERO(0) -#define cpuid_has_edxfeature(feature) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_highest_ext_func_supported() BUILD_ASSERT_OR_ZERO(0) +#define cpuid_test_feature(feature) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_has_ecxfeature(feature) BUILD_ASSERT_OR_ZERO(0) +#define cpuid_has_edxfeature(feature) BUILD_ASSERT_OR_ZERO(0) #endif #endif